| commit | 22ab8abddf9b60466a813ad8161d9ff587a7536a | [log] [tgz] |
|---|---|---|
| author | Andrew F. Davis <afd@ti.com> | Thu Jul 26 14:00:32 2018 -0500 |
| committer | Andrew F. Davis <afd@ti.com> | Thu Jul 26 14:14:06 2018 -0500 |
| tree | 03dcaa1e2dc937671f37d407428beb50ae193f94 | |
| parent | 07180432fd813f88ce27f5a056ded497ec2e781d [diff] |
PSCI: Fix logic error to skip cache flushing If either USE_COHERENT_MEM or HW_ASSISTED_COHERENCY being true should cause us to not enter the ifdef block, then the logic is not correct here. Posibly bad use of De Morgan's law? Fix this. Signed-off-by: Andrew F. Davis <afd@ti.com>