plat/arm: Re-enable PIE when RESET_TO_BL31=1
Earlier PIE support was enabled for all arm platforms when
RESET_TO_BL31=1, but later on it was restricted only to FVP with patch
SHA d4580d17 because of n1sdp platform.
Now it has been verified that PIE does work for n1sdp platform also, so
enabling it again for all arm platforms.
Change-Id: I05ad4f1775ef72e7cb578ec9245cde3fbce971a5
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index 53bd13f..941190f 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -403,21 +403,16 @@
#define BL31_LIMIT (ARM_AP_TZC_DRAM1_BASE + \
PLAT_ARM_MAX_BL31_SIZE)
#elif (RESET_TO_BL31)
-
-# if ENABLE_PIE
+/* Ensure Position Independent support (PIE) is enabled for this config.*/
+# if !ENABLE_PIE
+# error "BL31 must be a PIE if RESET_TO_BL31=1."
+#endif
/*
* Since this is PIE, we can define BL31_BASE to 0x0 since this macro is solely
* used for building BL31 and not used for loading BL31.
*/
# define BL31_BASE 0x0
# define BL31_LIMIT PLAT_ARM_MAX_BL31_SIZE
-# else
-/* Put BL31_BASE in the middle of the Trusted SRAM.*/
-# define BL31_BASE (ARM_TRUSTED_SRAM_BASE + \
- (PLAT_ARM_TRUSTED_SRAM_SIZE >> 1))
-# define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
-# endif /* ENABLE_PIE */
-
#else
/* Put BL31 below BL2 in the Trusted SRAM.*/
#define BL31_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 317f0ba..3a9972b 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -244,15 +244,10 @@
# Enable dynamic mitigation support by default
DYNAMIC_WORKAROUND_CVE_2018_3639 := 1
+# Enable reclaiming of BL31 initialisation code for secondary cores
+# stacks for FVP.
ifneq (${RESET_TO_BL31},1)
-# Enable reclaiming of BL31 initialisation code for secondary cores stacks for
-# FVP. We cannot enable PIE for this case because the overlayed init section
-# creates some dynamic relocations which cannot be handled by the fixup
-# logic currently.
RECLAIM_INIT_CODE := 1
-else
-# Enable PIE support when RESET_TO_BL31=1
-ENABLE_PIE := 1
endif
ifeq (${ENABLE_AMU},1)
diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk
index a4a29bf..acc3797 100644
--- a/plat/arm/common/arm_common.mk
+++ b/plat/arm/common/arm_common.mk
@@ -130,6 +130,11 @@
$(eval $(call assert_boolean,ARM_CRYPTOCELL_INTEG))
$(eval $(call add_define,ARM_CRYPTOCELL_INTEG))
+# Enable PIE support for RESET_TO_BL31 case
+ifeq (${RESET_TO_BL31},1)
+ ENABLE_PIE := 1
+endif
+
# CryptoCell integration relies on coherent buffers for passing data from
# the AP CPU to the CryptoCell
ifeq (${ARM_CRYPTOCELL_INTEG},1)