tree 7eaca38e1c7c093e8f4ee32f3fc10d71f5455c78
parent e5bd345897085888b783eb3d6d46c93d1a82ce20
author Marvin Hsu <marvinh@nvidia.com> 1491879648 +0800
committer Varun Wadekar <vwadekar@nvidia.com> 1547662278 -0800

Tegra210B01: SE1 and SE2/PKA1 context save (atomic)

This patch adds the implementation of the SE atomic context save
sequence. The atomic context-save consistently saves to the TZRAM
carveout; thus there is no need to declare context save buffer or
map MMU region in TZRAM for context save. The atomic context-save
routine is responsible to validate the context-save progress
counter, where CTX_SAVE_CNT=133(SE1)/646(SE2), and the SE error
status to ensure the context save procedure complete successfully.

Change-Id: Ic80843902af70e76415530266cb158f668976c42
Signed-off-by: Marvin Hsu <marvinh@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>