Merge changes I5bb43cb0,I6aebe2ca,Ib59df16a,I9d037ab2,I9df5a465, ... into integration
* changes:
fix(msm8916): add timeout for crash console TX flush
style(msm8916): use size macros
feat(msm8916): expose more timer frames
fix(msm8916): drop unneeded initialization of CNTACR
build(msm8916): disable unneeded workarounds
fix(msm8916): flush dcache after writing msm8916_entry_point
fix(msm8916): print \r before \n on UART console
diff --git a/plat/qti/msm8916/aarch64/msm8916_helpers.S b/plat/qti/msm8916/aarch64/msm8916_helpers.S
index dad9968..528c5a4 100644
--- a/plat/qti/msm8916/aarch64/msm8916_helpers.S
+++ b/plat/qti/msm8916/aarch64/msm8916_helpers.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021, Stephan Gerhold <stephan@gerhold.net>
+ * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -31,17 +31,6 @@
*/
func plat_crash_console_init
mov x1, #BLSP_UART2_BASE
-
- /*
- * If the non-secure world has been actively using the UART there might
- * be still some characters left to be sent in the FIFO. In that case,
- * resetting the transmitter too early might cause all output to become
- * corrupted. To avoid that, try to flush (wait until FIFO empty) first.
- */
- mov x4, lr
- bl console_uartdm_core_flush
- mov lr, x4
-
mov x0, #1
b console_uartdm_core_init
endfunc plat_crash_console_init
diff --git a/plat/qti/msm8916/aarch64/uartdm_console.S b/plat/qti/msm8916/aarch64/uartdm_console.S
index c69c193..6c65daf 100644
--- a/plat/qti/msm8916/aarch64/uartdm_console.S
+++ b/plat/qti/msm8916/aarch64/uartdm_console.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021, Stephan Gerhold <stephan@gerhold.net>
+ * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
*
* Based on aarch64/skeleton_console.S:
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
@@ -65,7 +65,21 @@
* -----------------------------------------------------------
*/
func console_uartdm_core_init
- /* Reset receiver */
+ /*
+ * Try to flush remaining characters from the TX FIFO before resetting
+ * the transmitter. Unfortunately there is no good way to check if
+ * the transmitter is actually enabled (and will finish eventually),
+ * so use a timeout to avoid looping forever.
+ */
+ mov w2, #65536
+1:
+ ldr w3, [x1, #UART_DM_SR]
+ tbnz w3, #UART_DM_SR_TXEMT_BIT, 2f
+ subs w2, w2, #1
+ b.ne 1b
+ /* Timeout */
+
+2: /* Reset receiver */
mov w3, #UART_DM_CR_RESET_RX
str w3, [x1, #UART_DM_CR]
@@ -113,10 +127,21 @@
* -----------------------------------------------------------
*/
func console_uartdm_core_putc
+ cmp w0, #'\n'
+ b.ne 2f
+
1: /* Loop until TX FIFO has space */
ldr w2, [x1, #UART_DM_SR]
tbz w2, #UART_DM_SR_TXRDY_BIT, 1b
+ /* Prepend '\r' to '\n' */
+ mov w2, #'\r'
+ str w2, [x1, #UART_DM_TF]
+
+2: /* Loop until TX FIFO has space */
+ ldr w2, [x1, #UART_DM_SR]
+ tbz w2, #UART_DM_SR_TXRDY_BIT, 2b
+
/* Write character to FIFO */
str w0, [x1, #UART_DM_TF]
ret
diff --git a/plat/qti/msm8916/include/msm8916_mmap.h b/plat/qti/msm8916/include/msm8916_mmap.h
index 406ae6b..d201536 100644
--- a/plat/qti/msm8916/include/msm8916_mmap.h
+++ b/plat/qti/msm8916/include/msm8916_mmap.h
@@ -8,9 +8,9 @@
#define MSM8916_MMAP_H
#define PCNOC_BASE 0x00000000
-#define PCNOC_SIZE 0x8000000 /* 128 MiB */
+#define PCNOC_SIZE SZ_128M
#define APCS_BASE 0x0b000000
-#define APCS_SIZE 0x800000 /* 8 MiB */
+#define APCS_SIZE SZ_8M
#define MPM_BASE (PCNOC_BASE + 0x04a0000)
#define MPM_PS_HOLD (MPM_BASE + 0xb000)
diff --git a/plat/qti/msm8916/include/platform_def.h b/plat/qti/msm8916/include/platform_def.h
index bfade70..6d5ff2b 100644
--- a/plat/qti/msm8916/include/platform_def.h
+++ b/plat/qti/msm8916/include/platform_def.h
@@ -16,11 +16,11 @@
* the overall limit to 128 KiB. This could be increased if needed by placing
* the "msm8916_entry_point" variable explicitly in the first 64 KiB of BL31.
*/
-#define BL31_LIMIT (BL31_BASE + 0x20000) /* 128 KiB */
-#define BL31_PROGBITS_LIMIT (BL31_BASE + 0x10000) /* 64 KiB */
+#define BL31_LIMIT (BL31_BASE + SZ_128K)
+#define BL31_PROGBITS_LIMIT (BL31_BASE + SZ_64K)
#define CACHE_WRITEBACK_GRANULE U(64)
-#define PLATFORM_STACK_SIZE U(0x1000)
+#define PLATFORM_STACK_SIZE SZ_4K
/* CPU topology: single cluster with 4 cores */
#define PLATFORM_CLUSTER_COUNT U(1)
diff --git a/plat/qti/msm8916/msm8916_bl31_setup.c b/plat/qti/msm8916/msm8916_bl31_setup.c
index 638cd09..8cba5c5 100644
--- a/plat/qti/msm8916/msm8916_bl31_setup.c
+++ b/plat/qti/msm8916/msm8916_bl31_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021, Stephan Gerhold <stephan@gerhold.net>
+ * Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -119,12 +119,8 @@
/* Set timer frequency */
mmio_write_32(APCS_QTMR + CNTCTLBASE_CNTFRQ, plat_get_syscnt_freq2());
- /* Make frame 0 available to non-secure world */
- mmio_write_32(APCS_QTMR + CNTNSAR, BIT_32(CNTNSAR_NS_SHIFT(0)));
- mmio_write_32(APCS_QTMR + CNTACR_BASE(0),
- BIT_32(CNTACR_RPCT_SHIFT) | BIT_32(CNTACR_RVCT_SHIFT) |
- BIT_32(CNTACR_RFRQ_SHIFT) | BIT_32(CNTACR_RVOFF_SHIFT) |
- BIT_32(CNTACR_RWVT_SHIFT) | BIT_32(CNTACR_RWPT_SHIFT));
+ /* Make all timer frames available to non-secure world */
+ mmio_write_32(APCS_QTMR + CNTNSAR, GENMASK_32(7, 0));
}
/*
diff --git a/plat/qti/msm8916/msm8916_pm.c b/plat/qti/msm8916/msm8916_pm.c
index 6891e38..792a096 100644
--- a/plat/qti/msm8916/msm8916_pm.c
+++ b/plat/qti/msm8916/msm8916_pm.c
@@ -1,10 +1,11 @@
/*
- * Copyright (c) 2021, Stephan Gerhold <stephan@gerhold.net>
+ * Copyright (c) 2021-2022, Stephan Gerhold <stephan@gerhold.net>
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch.h>
+#include <arch_helpers.h>
#include <common/debug.h>
#include <drivers/arm/gicv2.h>
#include <drivers/delay_timer.h>
@@ -53,7 +54,14 @@
int plat_setup_psci_ops(uintptr_t sec_entrypoint,
const plat_psci_ops_t **psci_ops)
{
+ /*
+ * The entry point is read with caches off (and even from two different
+ * physical addresses when read through the "boot remapper"), so make
+ * sure it is flushed to memory.
+ */
msm8916_entry_point = sec_entrypoint;
+ flush_dcache_range((uintptr_t)&msm8916_entry_point, sizeof(uintptr_t));
+
*psci_ops = &msm8916_psci_ops;
return 0;
}
diff --git a/plat/qti/msm8916/platform.mk b/plat/qti/msm8916/platform.mk
index 2baf203..107296b 100644
--- a/plat/qti/msm8916/platform.mk
+++ b/plat/qti/msm8916/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2021, Stephan Gerhold <stephan@gerhold.net>
+# Copyright (c) 2021-2023, Stephan Gerhold <stephan@gerhold.net>
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -46,6 +46,10 @@
ENABLE_SPE_FOR_NS := 0
ENABLE_SVE_FOR_NS := 0
+# Disable workarounds unnecessary for Cortex-A53
+WORKAROUND_CVE_2017_5715 := 0
+WORKAROUND_CVE_2022_23960 := 0
+
# MSM8916 uses ARM Cortex-A53 r0p0 so likely all the errata apply
ERRATA_A53_819472 := 1
ERRATA_A53_824069 := 1