tree 46eb7e70b607fd19e97329f219078302e5eaf28c
parent c36f7401f3efd31c43d7ab02d6cb35f69e2e54b4
author Nishanth Menon <nm@ti.com> 1616742400 -0500
committer Nishanth Menon <nm@ti.com> 1616743544 -0500

plat: ti: k3: board: Let explicitly map our SEC_SRAM_BASE to 0x0

ENABLE_PIE (position independent executable) is default on K3
platform to handle variant RAM configurations in the system. This,
unfortunately does cause confusion while reading the code, so, lets
make things explicit by selecting 0x0 as the "SEC_SRAM_BASE" out of
which we compute the BL31_BASE depending on usage.

Lets also document a warning while at it to help folks copying code
over to a custom K3 platform and optimizing size by disabling PIE to
modify the defaults.

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: I8e67a9210e907e266ff6a78ba4d02e3259bb2b21