fix(versal): enable a72 erratum 859971 and 1319367
TF-A is reporting that above two erratum are missing to be enabled that's
why enable them by default.
For futher information please refer to
https://developer.arm.com/documentation/epm012079/11/
where
859971 is "Speculative instruction prefetch to Execute-never (XN) memory
could cause deadlock or data integrity issue" and
1319367 is "Speculative AT instruction using out-of-context translation
regime could cause subsequent request to generate an incorrect
translation".
Change-Id: I408706713a169e53db63ac5657751b0b003e646d
Signed-off-by: Michal Simek <michal.simek@amd.com>
diff --git a/plat/xilinx/versal/platform.mk b/plat/xilinx/versal/platform.mk
index a8b2c94..8087297 100644
--- a/plat/xilinx/versal/platform.mk
+++ b/plat/xilinx/versal/platform.mk
@@ -11,6 +11,10 @@
IPI_CRC_CHECK := 0
HARDEN_SLS_ALL := 0
+# A72 Erratum for SoC
+ERRATA_A72_859971 := 1
+ERRATA_A72_1319367 := 1
+
ifdef VERSAL_ATF_MEM_BASE
$(eval $(call add_define,VERSAL_ATF_MEM_BASE))