| commit | 1cb3b488919c49b8220845ea069300d3795afe66 | [log] [tgz] |
|---|---|---|
| author | Haojian Zhuang <haojian.zhuang@linaro.org> | Mon Jan 29 11:42:42 2018 +0800 |
| committer | Haojian Zhuang <haojian.zhuang@linaro.org> | Mon Mar 05 09:51:33 2018 +0800 |
| tree | 46fd092c9247f1519f3dab7bf29b1b8794db23d0 | |
| parent | 3bd94381fa4b2af94494d7b9299fc51e47bda9cb [diff] |
hikey: clean dcache for SRAM after initialized Although SRAM is initialized, DCACHE should be cleaned too. Because MCU is a parrallel core to access SRAM. We need to make sure that initialized value is really written to SRAM before MCU using it. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>