Tegra194: add support for multiple SMMU devices
This patch adds support for all three SMMU devices present on the SoC.
The following changes have been done:
Add SMMU devices to the memory map
Update register read and write functions
Change-Id: I0007b496d2ae7264f4fa9f605d4b0a15fa747a0f
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
diff --git a/plat/nvidia/tegra/include/t194/tegra_def.h b/plat/nvidia/tegra/include/t194/tegra_def.h
index 8e7b28c..7bdd975 100644
--- a/plat/nvidia/tegra/include/t194/tegra_def.h
+++ b/plat/nvidia/tegra/include/t194/tegra_def.h
@@ -219,7 +219,9 @@
/*******************************************************************************
* Tegra SMMU Controller constants
******************************************************************************/
-#define TEGRA_SMMU_BASE 0x10000000
+#define TEGRA_SMMU0_BASE 0x12000000
+#define TEGRA_SMMU1_BASE 0x11000000
+#define TEGRA_SMMU2_BASE 0x10000000
/*******************************************************************************
* Tegra TZRAM constants