tree 1098bcb58684bbd8e8ab43548b3f3707584756b4
parent af3f466972b53fd0416ca3a19bab433cea5fe40f
author Manish V Badarkhe <Manish.Badarkhe@arm.com> 1652129719 +0100
committer Manish V Badarkhe <Manish.Badarkhe@arm.com> 1655326933 +0100

fix(gic600): implement workaround to forward highest priority interrupt

If the interrupt being targeted is released from the CPU before the
CLEAR command is sent to the CPU then a subsequent SET command may not
be delivered in a finite time. To workaround this, issue an unblocking
event by toggling GICR_CTLR.DPG* bits after clearing the cpu group
enable (EnableGrp* bits of GIC CPU interface register)
This fix is implemented as per the errata 2384374-part 2 workaround
mentioned here:
https://developer.arm.com/documentation/sden892601/latest/

Change-Id: I13926ceeb7740fa4c05cc5b43170e7ce49598f70
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>