commit 16d006bf6fd7735b692c9c8cce6247223b644ab4
author Soby Mathew <soby.mathew@arm.com> Fri May 03 13:17:56 2019 +0100
committer Soby Mathew <soby.mathew@arm.com> Tue May 07 13:46:47 2019 +0100
tree a154ae02c453f133ceceb9f6b7e4aae422cd19e9
parent 1d3ba1c535cc0dd1efc30192da6a68932c228a4b

Workaround for cortex-A76 errata 1286807

The workaround for Cortex-A76 errata #1286807 is implemented
in this patch.

Change-Id: I6c15af962ac99ce223e009f6d299cefb41043bed
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

include/arch/aarch64/asm_macros.S

diff --git a/include/arch/aarch64/asm_macros.S b/include/arch/aarch64/asm_macros.S
index 387be4c..9b12185 100644
--- a/include/arch/aarch64/asm_macros.S
+++ b/include/arch/aarch64/asm_macros.S
@@ -12,9 +12,9 @@
 
 /*
  * TLBI instruction with type specifier that implements the workaround for
- * errata 813419 of Cortex-A57.
+ * errata 813419 of Cortex-A57 or errata 1286807 of Cortex-A76.
  */
-#if ERRATA_A57_813419
+#if ERRATA_A57_813419 || ERRATA_A76_1286807
 #define TLB_INVALIDATE(_type) \
 	tlbi	_type; \
 	dsb	ish; \