commit 15ffb07d4b3731c50a9908d48c0e73d68ba45875
author Chungying Lu <chungying.lu@mediatek.corp-partner.google.com> Wed Apr 19 17:17:23 2023 +0800
committer developer <developer@mediatek.com> Tue Jun 06 13:45:40 2023 +0800
tree 95e3088755d607d97fbadeff884d3c329a8f74e6
parent eb629496a8ebcd2cc6029927f80fa41dbf0879a4

feat(mediatek): add APU bootup control smc call

Add APU bootup control smc call.
The steps of bootup flow:
  1. set up APU config.
  2. reset APU.
  3. set up APU boot config.
  4. boot APU.

Change-Id: I9e930070a64c7c4dcaa3a8b3d28b897823e9f53c

plat/mediatek/mt8188/include/platform_def.h

diff --git a/plat/mediatek/mt8188/include/platform_def.h b/plat/mediatek/mt8188/include/platform_def.h
index e72034c..29e4d21 100644
--- a/plat/mediatek/mt8188/include/platform_def.h
+++ b/plat/mediatek/mt8188/include/platform_def.h
@@ -28,7 +28,10 @@
  * APUSYS related constants
  ******************************************************************************/
 #define BCRM_FMEM_PDN_BASE	(IO_PHYS + 0x00276000)
+#define APU_MD32_SYSCTRL	(IO_PHYS + 0x09001000)
+#define APU_MD32_WDT		(IO_PHYS + 0x09002000)
 #define APU_RCX_CONFIG		(IO_PHYS + 0x09020000)
+#define APU_REVISER		(IO_PHYS + 0x0903c000)
 #define APU_RCX_VCORE_CONFIG	(IO_PHYS + 0x090e0000)
 #define APU_MBOX0		(IO_PHYS + 0x090e1000)
 #define APU_MBOX1		(IO_PHYS + 0x090e2000)