feat(stm32mp1): update memory mapping for STM32MP13
SYSRAM is only 128KB and starts at 0x2FFE0000.
SRAMs are added.
BL2 code and DTB sizes are also reduced to fit in 128KB.
Change-Id: I25da99ef5c08f8008ff00d38248d61b6045adad4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h
index 801b947..1d55807 100644
--- a/plat/st/stm32mp1/stm32mp1_def.h
+++ b/plat/st/stm32mp1/stm32mp1_def.h
@@ -69,8 +69,20 @@
#define STM32MP_ROM_SIZE U(0x00020000)
#define STM32MP_ROM_SIZE_2MB_ALIGNED U(0x00200000)
+#if STM32MP13
+#define STM32MP_SYSRAM_BASE U(0x2FFE0000)
+#define STM32MP_SYSRAM_SIZE U(0x00020000)
+#define SRAM1_BASE U(0x30000000)
+#define SRAM1_SIZE U(0x00004000)
+#define SRAM2_BASE U(0x30004000)
+#define SRAM2_SIZE U(0x00002000)
+#define SRAM3_BASE U(0x30006000)
+#define SRAM3_SIZE U(0x00002000)
+#endif /* STM32MP13 */
+#if STM32MP15
#define STM32MP_SYSRAM_BASE U(0x2FFC0000)
#define STM32MP_SYSRAM_SIZE U(0x00040000)
+#endif /* STM32MP15 */
#define STM32MP_NS_SYSRAM_SIZE PAGE_SIZE
#define STM32MP_NS_SYSRAM_BASE (STM32MP_SYSRAM_BASE + \
diff --git a/plat/st/stm32mp1/stm32mp1_fip_def.h b/plat/st/stm32mp1/stm32mp1_fip_def.h
index 41972e4..7a277fd 100644
--- a/plat/st/stm32mp1/stm32mp1_fip_def.h
+++ b/plat/st/stm32mp1/stm32mp1_fip_def.h
@@ -10,29 +10,51 @@
#define STM32MP_DDR_S_SIZE U(0x01E00000) /* 30 MB */
#define STM32MP_DDR_SHMEM_SIZE U(0x00200000) /* 2 MB */
+#if STM32MP13
+#define STM32MP_BL2_RO_SIZE U(0x00015000) /* 84 KB */
+#define STM32MP_BL2_SIZE U(0x00017000) /* 92 KB for BL2 */
+#define STM32MP_BL2_DTB_SIZE U(0x00004000) /* 16 KB for DTB */
+#endif /* STM32MP13 */
+#if STM32MP15
#define STM32MP_BL2_RO_SIZE U(0x00011000) /* 68 KB */
#define STM32MP_BL2_SIZE U(0x00016000) /* 88 KB for BL2 */
#define STM32MP_BL2_DTB_SIZE U(0x00007000) /* 28 KB for DTB */
+#endif /* STM32MP15 */
#define STM32MP_BL32_SIZE U(0x0001B000) /* 108 KB for BL32 */
#define STM32MP_BL32_DTB_SIZE U(0x00005000) /* 20 KB for DTB */
#define STM32MP_FW_CONFIG_MAX_SIZE PAGE_SIZE /* 4 KB for FCONF DTB */
#define STM32MP_HW_CONFIG_MAX_SIZE U(0x40000) /* 256 KB for HW config DTB */
+#if STM32MP13
+#define STM32MP_BL2_BASE (STM32MP_BL2_DTB_BASE + \
+ STM32MP_BL2_DTB_SIZE)
+#endif /* STM32MP13 */
+#if STM32MP15
#define STM32MP_BL2_BASE (STM32MP_SEC_SYSRAM_BASE + \
STM32MP_SEC_SYSRAM_SIZE - \
STM32MP_BL2_SIZE)
+#endif /* STM32MP15 */
#define STM32MP_BL2_RO_BASE STM32MP_BL2_BASE
#define STM32MP_BL2_RW_BASE (STM32MP_BL2_RO_BASE + \
STM32MP_BL2_RO_SIZE)
+#if STM32MP13
+#define STM32MP_BL2_RW_SIZE (STM32MP_SYSRAM_BASE + \
+ STM32MP_SYSRAM_SIZE - \
+ STM32MP_BL2_RW_BASE)
+
+#define STM32MP_BL2_DTB_BASE STM32MP_SEC_SYSRAM_BASE
+#endif /* STM32MP13 */
+#if STM32MP15
#define STM32MP_BL2_RW_SIZE (STM32MP_SEC_SYSRAM_BASE + \
STM32MP_SEC_SYSRAM_SIZE - \
STM32MP_BL2_RW_BASE)
#define STM32MP_BL2_DTB_BASE (STM32MP_BL2_BASE - \
STM32MP_BL2_DTB_SIZE)
+#endif /* STM32MP15 */
#define STM32MP_BL32_DTB_BASE STM32MP_SYSRAM_BASE
@@ -56,9 +78,14 @@
STM32MP_OPTEE_BASE)
#endif
+#if STM32MP13
+#define STM32MP_FW_CONFIG_BASE SRAM3_BASE
+#endif /* STM32MP13 */
+#if STM32MP15
#define STM32MP_FW_CONFIG_BASE (STM32MP_SYSRAM_BASE + \
STM32MP_SYSRAM_SIZE - \
PAGE_SIZE)
+#endif /* STM32MP15 */
#define STM32MP_HW_CONFIG_BASE (STM32MP_BL33_BASE + \
STM32MP_BL33_MAX_SIZE)