Merge changes I9eba2e34,Iab2a2a2f into integration
* changes:
refactor(cpus): replace adr with adr_l
refactor(build): introduce adr_l macro
diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index 962c362..e47b082 100644
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -450,7 +450,7 @@
*
* handler = (base + off) + (index << log2(size))
*/
- adr x11, (__RT_SVC_DESCS_START__ + RT_SVC_DESC_HANDLE)
+ adr_l x11, (__RT_SVC_DESCS_START__ + RT_SVC_DESC_HANDLE)
lsl w10, w15, #RT_SVC_SIZE_LOG2
ldr x15, [x11, w10, uxtw]
diff --git a/include/arch/aarch32/asm_macros.S b/include/arch/aarch32/asm_macros.S
index 3ba86e9..bccd2a7 100644
--- a/include/arch/aarch32/asm_macros.S
+++ b/include/arch/aarch32/asm_macros.S
@@ -241,4 +241,13 @@
cmp \temp, \bot
bhs div2
.endm
+
+ /*
+ * Helper macro to instruction adr <reg>, <symbol> where <symbol> is
+ * within the range +/- 4 GB.
+ */
+ .macro adr_l, dst, sym
+ adrp \dst, \sym
+ add \dst, \dst, :lo12:\sym
+ .endm
#endif /* ASM_MACROS_S */
diff --git a/include/arch/aarch64/asm_macros.S b/include/arch/aarch64/asm_macros.S
index d09ad0f..ec2acd5 100644
--- a/include/arch/aarch64/asm_macros.S
+++ b/include/arch/aarch64/asm_macros.S
@@ -317,4 +317,12 @@
#endif
.endm
+ /*
+ * Helper macro to instruction adr <reg>, <symbol> where <symbol> is
+ * within the range +/- 4 GB.
+ */
+ .macro adr_l, dst, sym
+ adrp \dst, \sym
+ add \dst, \dst, :lo12:\sym
+ .endm
#endif /* ASM_MACROS_S */
diff --git a/lib/cpus/aarch64/cpu_helpers.S b/lib/cpus/aarch64/cpu_helpers.S
index 1ae3180..3aa4f15 100644
--- a/lib/cpus/aarch64/cpu_helpers.S
+++ b/lib/cpus/aarch64/cpu_helpers.S
@@ -165,13 +165,13 @@
and w2, w2, w3
/* Get the cpu_ops end location */
- adr x5, (__CPU_OPS_END__ + CPU_MIDR)
+ adr_l x5, (__CPU_OPS_END__ + CPU_MIDR)
/* Initialize the return parameter */
mov x0, #0
1:
/* Get the cpu_ops start location */
- adr x4, (__CPU_OPS_START__ + CPU_MIDR)
+ adr_l x4, (__CPU_OPS_START__ + CPU_MIDR)
2:
/* Check if we have reached end of list */