tree 18a62bdfd0877088d7f5ec9a476422abe9a79a5b
parent 9b9e0acdda5545580eeecc786bd3eb421ee3b7a0
parent 6d441617bfe0008a1a07031017e73ac2edeaae14
author Madhukar Pappireddy <madhukar.pappireddy@arm.com> 1702308513 +0100
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1702308513 +0100

Merge changes If2743827,I163f8169,I97a69650 into integration

* changes:
  feat(imx8m): add 3600 MTps DDR PLL rate
  fix(imx8m): align 3200 MTps rate with U-Boot
  fix(imx8m): handle 3734 in addition to 3733 and 3732 MTps rates