commit | 6d441617bfe0008a1a07031017e73ac2edeaae14 | [log] [tgz] |
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author | Marek Vasut <marex@denx.de> | Thu Nov 30 22:18:49 2023 +0100 |
committer | Marek Vasut <marex@denx.de> | Sat Dec 02 06:47:44 2023 +0100 |
tree | deb1b71a76014e30f295e5a9fd07b90b9bb46296 | |
parent | ea6ce4edb845055da35282ea5e75372d3debb369 [diff] |
feat(imx8m): add 3600 MTps DDR PLL rate Add 3600 MTps DRAM and its 900 MHz PLL setting M=300 P=8 S=0 , so 24 MHz * 300 / 8 / 2^0 = 900 MHz ~ 3600 MTps (x4) . Signed-off-by: Marek Vasut <marex@denx.de> Change-Id: If2743827294efc0f981718f04b772cc462846195