feat(stm32mp2): use USART1 for debug console on ultra-fly boards
This commit configures the debug console to use USART1 for
ultra-fly boards, ensuring the early console works as expected
on these boards.
These changes are specific to the ultra-fly boards and do not
affect any other boards.
Change-Id: I17f2c50779426dc31a8e85d6903141c331882c86
Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>
diff --git a/plat/st/stm32mp2/platform.mk b/plat/st/stm32mp2/platform.mk
index d5e2785..06298a4 100644
--- a/plat/st/stm32mp2/platform.mk
+++ b/plat/st/stm32mp2/platform.mk
@@ -89,6 +89,19 @@
$(eval $(call TOOL_ADD_IMG,STM32MP_DDR_FW,--ddr-fw))
endif
+# Ultratronik Specific Boards
+ifeq ($(findstring ultra-fly,$(DTB_FILE_NAME)),ultra-fly)
+ULTRA_FLY := 1
+$(eval $(call assert_booleans,\
+ $(sort \
+ ULTRA_FLY \
+ )))
+$(eval $(call add_defines,\
+ $(sort \
+ ULTRA_FLY \
+ )))
+endif
+
# Enable flags for C files
$(eval $(call assert_booleans,\
$(sort \
diff --git a/plat/st/stm32mp2/stm32mp2_def.h b/plat/st/stm32mp2/stm32mp2_def.h
index 3e60cad..1b8c4f5 100644
--- a/plat/st/stm32mp2/stm32mp2_def.h
+++ b/plat/st/stm32mp2/stm32mp2_def.h
@@ -221,6 +221,22 @@
/* For UART crash console */
#define STM32MP_DEBUG_USART_CLK_FRQ 64000000
/* USART2 on HSI@64MHz, TX on GPIOA4 Alternate 6 */
+#ifdef ULTRA_FLY
+#define STM32MP_DEBUG_USART_BASE USART1_BASE
+#define DEBUG_UART_TX_GPIO_BANK_ADDRESS GPIOA_BASE
+#define DEBUG_UART_TX_GPIO_BANK_CLK_REG RCC_GPIOACFGR
+#define DEBUG_UART_TX_GPIO_BANK_CLK_EN RCC_GPIOxCFGR_GPIOxEN
+#define DEBUG_UART_TX_GPIO_PORT 3
+#define DEBUG_UART_TX_GPIO_ALTERNATE 6
+#define DEBUG_UART_TX_CLKSRC_REG RCC_XBAR8CFGR
+#define DEBUG_UART_TX_CLKSRC XBAR_SRC_HSI
+#define DEBUG_UART_TX_EN_REG RCC_USART1CFGR
+#define DEBUG_UART_TX_EN RCC_UARTxCFGR_UARTxEN
+#define DEBUG_UART_RST_REG RCC_USART1CFGR
+#define DEBUG_UART_RST_BIT RCC_UARTxCFGR_UARTxRST
+#define DEBUG_UART_PREDIV_CFGR RCC_PREDIV19CFGR
+#define DEBUG_UART_FINDIV_CFGR RCC_FINDIV19CFGR
+#else
#define STM32MP_DEBUG_USART_BASE USART2_BASE
#define DEBUG_UART_TX_GPIO_BANK_ADDRESS GPIOA_BASE
#define DEBUG_UART_TX_GPIO_BANK_CLK_REG RCC_GPIOACFGR
@@ -235,6 +251,7 @@
#define DEBUG_UART_RST_BIT RCC_UARTxCFGR_UARTxRST
#define DEBUG_UART_PREDIV_CFGR RCC_PREDIV8CFGR
#define DEBUG_UART_FINDIV_CFGR RCC_FINDIV8CFGR
+#endif
/*******************************************************************************
* STM32MP2 SDMMC