feat(fpga): enable new CPU features

Newer cores implemented in the FPGAs used by Arm Ltd. support more
ARMv9 features.

Enable TCR2, MTE, MTE2, SME and SME2 as "enable if available" (:=2), so
any users of those features in lower ELs will not trigger a trap into
BL31.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Id99ecb7c5d6a25b77f7cc5fcad63f60027a4fd5a
diff --git a/plat/arm/board/arm_fpga/platform.mk b/plat/arm/board/arm_fpga/platform.mk
index bf7c59b..82401db 100644
--- a/plat/arm/board/arm_fpga/platform.mk
+++ b/plat/arm/board/arm_fpga/platform.mk
@@ -41,8 +41,12 @@
 ENABLE_FEAT_ECV			:= 2
 ENABLE_FEAT_FGT			:= 2
 ENABLE_FEAT_HCX			:= 2
+ENABLE_FEAT_MTE2		:= 2
+ENABLE_FEAT_TCR2		:= 2
 ENABLE_SYS_REG_TRACE_FOR_NS	:= 2
 ENABLE_TRF_FOR_NS		:= 2
+ENABLE_SME_FOR_NS		:= 2
+ENABLE_SME2_FOR_NS		:= 2
 
 # Treating this as a memory-constrained port for now
 USE_COHERENT_MEM	:=	0