Fix reset to BL3-1 instructions in user guide, part 3

Patch 20d51ca moved the shared data page from the top of the
Trusted SRAM to the bottom, changing the load addresses of BL3-1
and BL3-2.

This patch updates BL3-1 and BL3-2 addresses in the instructions
to run the Trusted Firmware on FVP using BL3-1 as reset vector.

This patch is similar to but distinct from bfb1dd5 and 7ea4c43.

Change-Id: I6b467f9a82360a5e2181db99fea881487de52704
diff --git a/docs/user-guide.md b/docs/user-guide.md
index 0b95a1b..bd84347 100644
--- a/docs/user-guide.md
+++ b/docs/user-guide.md
@@ -814,16 +814,16 @@
     -C cluster1.NUM_CORES=4                                      \
     -C cache_state_modelled=1                                    \
     -C bp.pl011_uart0.untimed_fifos=1                            \
-    -C cluster0.cpu0.RVBAR=0x04022000                            \
-    -C cluster0.cpu1.RVBAR=0x04022000                            \
-    -C cluster0.cpu2.RVBAR=0x04022000                            \
-    -C cluster0.cpu3.RVBAR=0x04022000                            \
-    -C cluster1.cpu0.RVBAR=0x04022000                            \
-    -C cluster1.cpu1.RVBAR=0x04022000                            \
-    -C cluster1.cpu2.RVBAR=0x04022000                            \
-    -C cluster1.cpu3.RVBAR=0x04022000                            \
-    --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04022000    \
-    --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04000000    \
+    -C cluster0.cpu0.RVBAR=0x04023000                            \
+    -C cluster0.cpu1.RVBAR=0x04023000                            \
+    -C cluster0.cpu2.RVBAR=0x04023000                            \
+    -C cluster0.cpu3.RVBAR=0x04023000                            \
+    -C cluster1.cpu0.RVBAR=0x04023000                            \
+    -C cluster1.cpu1.RVBAR=0x04023000                            \
+    -C cluster1.cpu2.RVBAR=0x04023000                            \
+    -C cluster1.cpu3.RVBAR=0x04023000                            \
+    --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000    \
+    --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000    \
     --data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000    \
     -C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"
 
@@ -841,16 +841,16 @@
     -C bp.tzc_400.diagnostics=1                                  \
     -C cache_state_modelled=1                                    \
     -C bp.pl011_uart0.untimed_fifos=1                            \
-    -C cluster0.cpu0.RVBARADDR=0x04022000                        \
-    -C cluster0.cpu1.RVBARADDR=0x04022000                        \
-    -C cluster0.cpu2.RVBARADDR=0x04022000                        \
-    -C cluster0.cpu3.RVBARADDR=0x04022000                        \
-    -C cluster1.cpu0.RVBARADDR=0x04022000                        \
-    -C cluster1.cpu1.RVBARADDR=0x04022000                        \
-    -C cluster1.cpu2.RVBARADDR=0x04022000                        \
-    -C cluster1.cpu3.RVBARADDR=0x04022000                        \
-    --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04022000    \
-    --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04000000    \
+    -C cluster0.cpu0.RVBARADDR=0x04023000                        \
+    -C cluster0.cpu1.RVBARADDR=0x04023000                        \
+    -C cluster0.cpu2.RVBARADDR=0x04023000                        \
+    -C cluster0.cpu3.RVBARADDR=0x04023000                        \
+    -C cluster1.cpu0.RVBARADDR=0x04023000                        \
+    -C cluster1.cpu1.RVBARADDR=0x04023000                        \
+    -C cluster1.cpu2.RVBARADDR=0x04023000                        \
+    -C cluster1.cpu3.RVBARADDR=0x04023000                        \
+    --data cluster0.cpu0="<path-to>/<bl31-binary>"@0x04023000    \
+    --data cluster0.cpu0="<path-to>/<bl32-binary>"@0x04001000    \
     --data cluster0.cpu0="<path-to>/<bl33-binary>"@0x88000000    \
     -C bp.virtioblockdevice.image_path="<path-to>/<file-system-image>"