commit 126abf694d8cfce430e1defddcf2f8c02d1f78d8
author Madhukar Pappireddy <madhukar.pappireddy@arm.com> Tue Jun 01 16:45:49 2021 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Tue Jun 01 16:45:49 2021 +0200
tree 8615e63504002bb6e035947528fa38aa7701c6ea
parent e555a38a5ec2ab4e669936131f202f3da5cabe14
parent fee856d4a82321b470da307c4d933aa43b05727c

Merge "fix(plat/marvell/a3720/uart): fix configuring UART clock" into integration

drivers/marvell/uart/a3700_console.S

diff --git a/drivers/marvell/uart/a3700_console.S b/drivers/marvell/uart/a3700_console.S
index ad2ccf2..218fd86 100644
--- a/drivers/marvell/uart/a3700_console.S
+++ b/drivers/marvell/uart/a3700_console.S
@@ -49,12 +49,9 @@
 	lsl	w2, w2, #4
 	add	w1, w1, w2, lsr #1
 	udiv	w2, w1, w2
-	and	w2, w2, #0x3ff
+	and	w2, w2, #0x3ff /* clear all other bits to use default clock */
 
-	ldr	w3, [x0, #UART_BAUD_REG]
-	bic	w3, w3, 0x3ff
-	orr	w3, w3, w2
-	str	w3, [x0, #UART_BAUD_REG]/* set baud rate divisor */
+	str	w2, [x0, #UART_BAUD_REG]/* set baud rate divisor */
 
 	/* Set UART to default 16X scheme */
 	mov	w3, #0