feat(intel): add support for query SDM config error and status
Currently the FPGA reconfig status only return a single error status
which make the debugging of FPGA reconfiguration hard.
This patch is to expose the error status, major error code and
minor error code, for the FPGA reconfig to upper layer app.
Change-Id: I2fc68e30b45ff137f3e52f9569fdf2eaf2ca94ee
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
diff --git a/plat/intel/soc/common/include/socfpga_mailbox.h b/plat/intel/soc/common/include/socfpga_mailbox.h
index dfa409f..e27af21 100644
--- a/plat/intel/soc/common/include/socfpga_mailbox.h
+++ b/plat/intel/soc/common/include/socfpga_mailbox.h
@@ -243,7 +243,8 @@
void mailbox_reset_warm(uint32_t reset_type);
void mailbox_clear_response(void);
-int intel_mailbox_get_config_status(uint32_t cmd, bool init_done);
+int intel_mailbox_get_config_status(uint32_t cmd, bool init_done,
+ uint32_t *err_states);
int intel_mailbox_is_fpga_not_ready(void);
#if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5