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git01.mediatek.com / filogic / atf / 10bb1a83e646d4f00d6d60c3cff965ad3c46b9d9 / . / plat / xilinx / versal_net
tree: 56ff47707dd26c03a0d82fcf18b516d8dcf9eb65 [path history] [tgz]
  1. aarch64/
  2. include/
  3. pm_service/
  4. bl31_versal_net_setup.c
  5. plat_psci.c
  6. plat_psci_pm.c
  7. plat_topology.c
  8. platform.mk
  9. sip_svc_setup.c
  10. versal_net_gicv3.c
  11. versal_net_ipi.c