| commit | 0ecd76385944e69732833d5e8cea1e5a9c1d1be8 | [log] [tgz] |
|---|---|---|
| author | Manish V Badarkhe <manish.badarkhe@arm.com> | Mon Aug 05 17:43:33 2024 +0200 |
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Mon Aug 05 17:43:33 2024 +0200 |
| tree | 5ecbcc64f9ff38fcfb5f0af884e2902f52965d80 | |
| parent | b4fd8279dc31155d56fb17e6df50c83ef5905a18 [diff] | |
| parent | 9247a60b453356e484a21aa9df814dbbbab7668b [diff] |
Merge changes from topic "us_pmu" into integration * changes: fix(tc): correct CPU PMU binding feat(tc): add device tree binding for SPE feat(tc): add PPI partitions in DT binding feat(tc): change GIC DT property 'interrupt-cells' to 4 feat(tc): add NI-Tower PMU node for TC3 feat(tc): setup ni-tower non-secure access for TC3