refactor(sgi): move apis and types to "nrd" prefix
Currently, functions and types internal to "neoverse_rd" platforms are
named with "sgi" as the prefix. Since common code and platforms are no
longer under the "sgi" umbrella, move the prefix to "nrd". This change
would amend the prefixes for functions, types and objects.
Signed-off-by: Rohit Mathew <Rohit.Mathew@arm.com>
Change-Id: I706a82bddf55c3be7cf9cef9aaa5df6d420098ca
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_plat.h b/plat/arm/board/neoverse_rd/common/include/nrd_plat.h
index d5bfb60..ce5e16d 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_plat.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_plat.h
@@ -8,6 +8,6 @@
#define NRD_PLAT_H
/* BL31 platform setup common to all SGI based platforms */
-void sgi_bl31_common_platform_setup(void);
+void nrd_bl31_common_platform_setup(void);
#endif /* NRD_PLAT_H */
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_ras.h b/plat/arm/board/neoverse_rd/common/include/nrd_ras.h
index e5c3f2c..86192ff 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_ras.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_ras.h
@@ -29,15 +29,15 @@
} mm_communicate_header_t;
/* RAS error info data structure. */
-struct sgi_ras_ev_map {
+struct nrd_ras_ev_map {
int sdei_ev_num; /* SDEI Event number */
int intr; /* Physical intr number */
int intr_type; /* Interrupt Type (SPI or PPI)*/
};
/* RAS config data structure. Must be defined by each platform. */
-struct plat_sgi_ras_config {
- struct sgi_ras_ev_map *ev_map;
+struct plat_nrd_ras_config {
+ struct nrd_ras_ev_map *ev_map;
int ev_map_size;
};
@@ -45,7 +45,7 @@
* Find event map for a given interrupt number. On success, returns pointer
* to the event map. On error, returns NULL.
*/
-struct sgi_ras_ev_map *sgi_find_ras_event_map_by_intr(uint32_t intr_num);
+struct nrd_ras_ev_map *nrd_find_ras_event_map_by_intr(uint32_t intr_num);
/*
* Initialization function for the framework.
@@ -53,15 +53,15 @@
* Registers RAS config provided by the platform and then configures and
* enables interrupt for each registered error. On success, return 0.
*/
-int sgi_ras_platform_setup(struct plat_sgi_ras_config *config);
+int nrd_ras_platform_setup(struct plat_nrd_ras_config *config);
/* Base element RAM RAS interrupt handler function. */
-int sgi_ras_sram_intr_handler(const struct err_record_info *err_rec,
+int nrd_ras_sram_intr_handler(const struct err_record_info *err_rec,
int probe_data,
const struct err_handler_data *const data);
/* CPU RAS interrupt handler */
-int sgi_ras_cpu_intr_handler(const struct err_record_info *err_rec,
+int nrd_ras_cpu_intr_handler(const struct err_record_info *err_rec,
int probe_data,
const struct err_handler_data *const data);
diff --git a/plat/arm/board/neoverse_rd/common/include/nrd_variant.h b/plat/arm/board/neoverse_rd/common/include/nrd_variant.h
index ac7c81c..b2ac2ac 100644
--- a/plat/arm/board/neoverse_rd/common/include/nrd_variant.h
+++ b/plat/arm/board/neoverse_rd/common/include/nrd_variant.h
@@ -29,22 +29,22 @@
#define RD_V2_CONFIG_ID 0x1
/* Structure containing SGI platform variant information */
-typedef struct sgi_platform_info {
+typedef struct nrd_platform_info {
unsigned int platform_id; /* Part Number of the platform */
unsigned int config_id; /* Config Id of the platform */
unsigned int chip_id; /* Chip Id or Node number */
unsigned int multi_chip_mode; /* Multi-chip mode availability */
-} sgi_platform_info_t;
+} nrd_platform_info_t;
-extern sgi_platform_info_t sgi_plat_info;
+extern nrd_platform_info_t nrd_plat_info;
/* returns the part number of the platform*/
-unsigned int plat_arm_sgi_get_platform_id(void);
+unsigned int plat_arm_nrd_get_platform_id(void);
/* returns the configuration id of the platform */
-unsigned int plat_arm_sgi_get_config_id(void);
+unsigned int plat_arm_nrd_get_config_id(void);
/* returns true if operating in multi-chip configuration */
-unsigned int plat_arm_sgi_get_multi_chip_mode(void);
+unsigned int plat_arm_nrd_get_multi_chip_mode(void);
#endif /* NRD_VARIANT_H */
diff --git a/plat/arm/board/neoverse_rd/common/nrd_bl31_setup.c b/plat/arm/board/neoverse_rd/common/nrd_bl31_setup.c
index 0ba4df8..0c6a162 100644
--- a/plat/arm/board/neoverse_rd/common/nrd_bl31_setup.c
+++ b/plat/arm/board/neoverse_rd/common/nrd_bl31_setup.c
@@ -20,7 +20,7 @@
#include <nrd_ras.h>
#include <nrd_variant.h>
-sgi_platform_info_t sgi_plat_info;
+nrd_platform_info_t nrd_plat_info;
static scmi_channel_plat_info_t sgi575_scmi_plat_info = {
.scmi_mbx_mem = CSS_SCMI_PAYLOAD_BASE,
@@ -75,17 +75,17 @@
scmi_channel_plat_info_t *plat_css_get_scmi_info(unsigned int channel_id)
{
- if (sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM ||
- sgi_plat_info.platform_id == RD_V1_SID_VER_PART_NUM ||
- sgi_plat_info.platform_id == RD_N2_SID_VER_PART_NUM ||
- sgi_plat_info.platform_id == RD_V2_SID_VER_PART_NUM ||
- sgi_plat_info.platform_id == RD_N2_CFG1_SID_VER_PART_NUM ||
- sgi_plat_info.platform_id == RD_N2_CFG3_SID_VER_PART_NUM) {
+ if (nrd_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM ||
+ nrd_plat_info.platform_id == RD_V1_SID_VER_PART_NUM ||
+ nrd_plat_info.platform_id == RD_N2_SID_VER_PART_NUM ||
+ nrd_plat_info.platform_id == RD_V2_SID_VER_PART_NUM ||
+ nrd_plat_info.platform_id == RD_N2_CFG1_SID_VER_PART_NUM ||
+ nrd_plat_info.platform_id == RD_N2_CFG3_SID_VER_PART_NUM) {
if (channel_id >= ARRAY_SIZE(plat_rd_scmi_info)) {
panic();
}
return &plat_rd_scmi_info[channel_id];
- } else if (sgi_plat_info.platform_id == SGI575_SSC_VER_PART_NUM) {
+ } else if (nrd_plat_info.platform_id == SGI575_SSC_VER_PART_NUM) {
return &sgi575_scmi_plat_info;
} else {
panic();
@@ -95,14 +95,14 @@
void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
u_register_t arg2, u_register_t arg3)
{
- sgi_plat_info.platform_id = plat_arm_sgi_get_platform_id();
- sgi_plat_info.config_id = plat_arm_sgi_get_config_id();
- sgi_plat_info.multi_chip_mode = plat_arm_sgi_get_multi_chip_mode();
+ nrd_plat_info.platform_id = plat_arm_nrd_get_platform_id();
+ nrd_plat_info.config_id = plat_arm_nrd_get_config_id();
+ nrd_plat_info.multi_chip_mode = plat_arm_nrd_get_multi_chip_mode();
arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
}
-void sgi_bl31_common_platform_setup(void)
+void nrd_bl31_common_platform_setup(void)
{
generic_delay_timer_init();
@@ -124,8 +124,8 @@
* For RD-E1-Edge, only CPU power ON/OFF, PSCI platform callbacks are
* supported.
*/
- if (((sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM) &&
- (sgi_plat_info.config_id == RD_E1_EDGE_CONFIG_ID))) {
+ if (((nrd_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM) &&
+ (nrd_plat_info.config_id == RD_E1_EDGE_CONFIG_ID))) {
ops->cpu_standby = NULL;
ops->system_off = NULL;
ops->system_reset = NULL;
diff --git a/plat/arm/board/neoverse_rd/common/nrd_image_load.c b/plat/arm/board/neoverse_rd/common/nrd_image_load.c
index b47f07a..39de0ab 100644
--- a/plat/arm/board/neoverse_rd/common/nrd_image_load.c
+++ b/plat/arm/board/neoverse_rd/common/nrd_image_load.c
@@ -26,7 +26,7 @@
};
/* Function to read isolated CPU MPID list from SDS. */
-void plat_arm_sgi_get_isolated_cpu_list(struct isolated_cpu_mpid_list *list)
+void plat_arm_nrd_get_isolated_cpu_list(struct isolated_cpu_mpid_list *list)
{
int ret;
@@ -75,7 +75,7 @@
* isolated-cpu-list = <0>
* }
******************************************************************************/
-static int plat_sgi_append_config_node(void)
+static int plat_nrd_append_config_node(void)
{
bl_mem_params_node_t *mem_params;
void *fdt;
@@ -103,28 +103,28 @@
return -1;
}
- platid = plat_arm_sgi_get_platform_id();
+ platid = plat_arm_nrd_get_platform_id();
err = fdt_setprop_u32(fdt, nodeoffset, "platform-id", platid);
if (err < 0) {
ERROR("Failed to set platform-id\n");
return -1;
}
- platcfg = plat_arm_sgi_get_config_id();
+ platcfg = plat_arm_nrd_get_config_id();
err = fdt_setprop_u32(fdt, nodeoffset, "config-id", platcfg);
if (err < 0) {
ERROR("Failed to set config-id\n");
return -1;
}
- platcfg = plat_arm_sgi_get_multi_chip_mode();
+ platcfg = plat_arm_nrd_get_multi_chip_mode();
err = fdt_setprop_u32(fdt, nodeoffset, "multi-chip-mode", platcfg);
if (err < 0) {
ERROR("Failed to set multi-chip-mode\n");
return -1;
}
- plat_arm_sgi_get_isolated_cpu_list(&cpu_mpid_list);
+ plat_arm_nrd_get_isolated_cpu_list(&cpu_mpid_list);
if (cpu_mpid_list.num_entries > 0) {
err = fdt_setprop(fdt, nodeoffset, "isolated-cpu-list",
&cpu_mpid_list,
@@ -148,7 +148,7 @@
{
int ret;
- ret = plat_sgi_append_config_node();
+ ret = plat_nrd_append_config_node();
if (ret != 0)
panic();
diff --git a/plat/arm/board/neoverse_rd/common/nrd_plat.c b/plat/arm/board/neoverse_rd/common/nrd_plat.c
index 64a6065..692139c 100644
--- a/plat/arm/board/neoverse_rd/common/nrd_plat.c
+++ b/plat/arm/board/neoverse_rd/common/nrd_plat.c
@@ -178,13 +178,13 @@
sbsa_wdog_stop(SBSA_SECURE_WDOG_BASE);
}
-static sds_region_desc_t sgi_sds_regions[] = {
+static sds_region_desc_t nrd_sds_regions[] = {
{ .base = PLAT_ARM_SDS_MEM_BASE },
};
sds_region_desc_t *plat_sds_get_regions(unsigned int *region_count)
{
- *region_count = ARRAY_SIZE(sgi_sds_regions);
+ *region_count = ARRAY_SIZE(nrd_sds_regions);
- return sgi_sds_regions;
+ return nrd_sds_regions;
}
diff --git a/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c b/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c
index b0d6ca3..c07117e 100644
--- a/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c
+++ b/plat/arm/board/neoverse_rd/common/nrd_plat_v2.c
@@ -179,13 +179,13 @@
sbsa_wdog_stop(SBSA_SECURE_WDOG_BASE);
}
-static sds_region_desc_t sgi_sds_regions[] = {
+static sds_region_desc_t nrd_sds_regions[] = {
{ .base = PLAT_ARM_SDS_MEM_BASE },
};
sds_region_desc_t *plat_sds_get_regions(unsigned int *region_count)
{
- *region_count = ARRAY_SIZE(sgi_sds_regions);
+ *region_count = ARRAY_SIZE(nrd_sds_regions);
- return sgi_sds_regions;
+ return nrd_sds_regions;
}
diff --git a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c
index d920560..85d927d 100644
--- a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c
+++ b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_common.c
@@ -13,25 +13,25 @@
#include <nrd_ras.h>
-static struct plat_sgi_ras_config *sgi_ras_config;
+static struct plat_nrd_ras_config *nrd_ras_config;
/*
* Find event map for a given interrupt number. On success, returns pointer to
* the event map. On error, returns NULL.
*/
-struct sgi_ras_ev_map *sgi_find_ras_event_map_by_intr(uint32_t intr_num)
+struct nrd_ras_ev_map *nrd_find_ras_event_map_by_intr(uint32_t intr_num)
{
- struct sgi_ras_ev_map *map;
+ struct nrd_ras_ev_map *map;
int size;
int i;
- if (sgi_ras_config == NULL) {
+ if (nrd_ras_config == NULL) {
ERROR("RAS config is NULL\n");
return NULL;
}
- map = sgi_ras_config->ev_map;
- size = sgi_ras_config->ev_map_size;
+ map = nrd_ras_config->ev_map;
+ size = nrd_ras_config->ev_map_size;
for (i = 0; i < size; i++) {
if (map->intr == intr_num)
@@ -47,7 +47,7 @@
* Programs GIC registers and configures interrupt ID's as Group0 EL3
* interrupts. Current support is to register PPI and SPI interrupts.
*/
-static void sgi_ras_intr_configure(int intr, int intr_type)
+static void nrd_ras_intr_configure(int intr, int intr_type)
{
plat_ic_set_interrupt_type(intr, INTR_TYPE_EL3);
plat_ic_set_interrupt_priority(intr, PLAT_RAS_PRI);
@@ -67,9 +67,9 @@
* Registers RAS config provided by the platform and then configures and
* enables interrupt for each registered error. On success, return 0.
*/
-int sgi_ras_platform_setup(struct plat_sgi_ras_config *config)
+int nrd_ras_platform_setup(struct plat_nrd_ras_config *config)
{
- struct sgi_ras_ev_map *map;
+ struct nrd_ras_ev_map *map;
int size;
int i;
@@ -83,13 +83,13 @@
* Maintain a reference to the platform RAS config data for later
* use.
*/
- sgi_ras_config = config;
+ nrd_ras_config = config;
- map = sgi_ras_config->ev_map;
- size = sgi_ras_config->ev_map_size;
+ map = nrd_ras_config->ev_map;
+ size = nrd_ras_config->ev_map_size;
for (i = 0; i < size; i++) {
- sgi_ras_intr_configure(map->intr, map->intr_type);
+ nrd_ras_intr_configure(map->intr, map->intr_type);
map++;
}
diff --git a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
index 71d1775..d25fa7c 100644
--- a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
+++ b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_cpu.c
@@ -143,11 +143,11 @@
}
/* CPU RAS interrupt handler */
-int sgi_ras_cpu_intr_handler(const struct err_record_info *err_rec,
+int nrd_ras_cpu_intr_handler(const struct err_record_info *err_rec,
int probe_data,
const struct err_handler_data *const data)
{
- struct sgi_ras_ev_map *ras_map;
+ struct nrd_ras_ev_map *ras_map;
mm_communicate_header_t *header;
cpu_err_info cpu_info = {0};
uint64_t clear_status;
@@ -186,7 +186,7 @@
* Find if this is a RAS interrupt. There must be an event against
* this interrupt
*/
- ras_map = sgi_find_ras_event_map_by_intr(intr);
+ ras_map = nrd_find_ras_event_map_by_intr(intr);
if (ras_map == NULL) {
ERROR("SGI: RAS error info for interrupt id: %d not found\n",
intr);
diff --git a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c
index 8f4fb4c..95bc3a4 100644
--- a/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c
+++ b/plat/arm/board/neoverse_rd/common/ras/nrd_ras_sram.c
@@ -22,11 +22,11 @@
* Base Element RAM error information data structure communicated as part of MM
* Communication data payload.
*/
-typedef struct sgi_sram_err_info {
+typedef struct nrd_sram_err_info {
uint32_t err_status;
uint32_t err_code;
uint32_t err_addr;
-} sgi_sram_err_info_t;
+} nrd_sram_err_info_t;
/*
* MM Communicate message header GUID to indicate the payload is intended for
@@ -38,13 +38,13 @@
};
/* Base element RAM RAS error interrupt handler */
-int sgi_ras_sram_intr_handler(const struct err_record_info *err_rec,
+int nrd_ras_sram_intr_handler(const struct err_record_info *err_rec,
int probe_data,
const struct err_handler_data *const data)
{
- struct sgi_ras_ev_map *ras_map;
+ struct nrd_ras_ev_map *ras_map;
mm_communicate_header_t *header;
- sgi_sram_err_info_t sram_info;
+ nrd_sram_err_info_t sram_info;
uintptr_t base_addr;
uint32_t clear_status, intr;
int ret;
@@ -87,7 +87,7 @@
* Find if this is a RAS interrupt. There must be an event against
* this interrupt
*/
- ras_map = sgi_find_ras_event_map_by_intr(intr);
+ ras_map = nrd_find_ras_event_map_by_intr(intr);
if (ras_map == NULL) {
ERROR("SGI: RAS error info for interrupt id: %d not found\n",
intr);