Merge pull request #1619 from antonio-nino-diaz-arm/an/norflash
plat/arm: Move norflash driver to drivers/ folder
diff --git a/include/common/runtime_svc.h b/include/common/runtime_svc.h
index 6fe0a94..e32c287 100644
--- a/include/common/runtime_svc.h
+++ b/include/common/runtime_svc.h
@@ -4,8 +4,8 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __RUNTIME_SVC_H__
-#define __RUNTIME_SVC_H__
+#ifndef RUNTIME_SVC_H
+#define RUNTIME_SVC_H
#include <bl_common.h> /* to include exception types */
#include <cassert.h>
@@ -88,12 +88,12 @@
#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \
static const rt_svc_desc_t __svc_desc_ ## _name \
__section("rt_svc_descs") __used = { \
- .start_oen = _start, \
- .end_oen = _end, \
- .call_type = _type, \
+ .start_oen = (_start), \
+ .end_oen = (_end), \
+ .call_type = (_type), \
.name = #_name, \
- .init = _setup, \
- .handle = _smch \
+ .init = (_setup), \
+ .handle = (_smch) \
}
#elif SMCCC_MAJOR_VERSION == 2
@@ -101,12 +101,12 @@
#define DECLARE_RT_SVC(_name, _start, _end, _type, _setup, _smch) \
static const rt_svc_desc_t __svc_desc_ ## _name \
__section("rt_svc_descs") __used = { \
- .start_oen = _start, \
- .end_oen = _end, \
+ .start_oen = (_start), \
+ .end_oen = (_end), \
.is_vendor = 0, \
.name = #_name, \
- .init = _setup, \
- .handle = _smch, \
+ .init = (_setup), \
+ .handle = (_smch), \
}; \
CASSERT((_type) == SMC_TYPE_FAST, rt_svc_type_check_ ## _name)
@@ -198,4 +198,4 @@
extern uint8_t rt_svc_descs_indices[MAX_RT_SVCS];
#endif /*__ASSEMBLY__*/
-#endif /* __RUNTIME_SVC_H__ */
+#endif /* RUNTIME_SVC_H */
diff --git a/include/plat/arm/board/common/v2m_def.h b/include/plat/arm/board/common/v2m_def.h
index ce436d2..02c3494 100644
--- a/include/plat/arm/board/common/v2m_def.h
+++ b/include/plat/arm/board/common/v2m_def.h
@@ -1,36 +1,36 @@
/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __V2M_DEF_H__
-#define __V2M_DEF_H__
+#ifndef V2M_DEF_H
+#define V2M_DEF_H
#include <arm_xlat_tables.h>
/* V2M motherboard system registers & offsets */
-#define V2M_SYSREGS_BASE 0x1c010000
-#define V2M_SYS_ID 0x0
-#define V2M_SYS_SWITCH 0x4
-#define V2M_SYS_LED 0x8
-#define V2M_SYS_NVFLAGS 0x38
-#define V2M_SYS_NVFLAGSSET 0x38
-#define V2M_SYS_NVFLAGSCLR 0x3c
-#define V2M_SYS_CFGDATA 0xa0
-#define V2M_SYS_CFGCTRL 0xa4
-#define V2M_SYS_CFGSTATUS 0xa8
+#define V2M_SYSREGS_BASE UL(0x1c010000)
+#define V2M_SYS_ID UL(0x0)
+#define V2M_SYS_SWITCH UL(0x4)
+#define V2M_SYS_LED UL(0x8)
+#define V2M_SYS_NVFLAGS UL(0x38)
+#define V2M_SYS_NVFLAGSSET UL(0x38)
+#define V2M_SYS_NVFLAGSCLR UL(0x3c)
+#define V2M_SYS_CFGDATA UL(0xa0)
+#define V2M_SYS_CFGCTRL UL(0xa4)
+#define V2M_SYS_CFGSTATUS UL(0xa8)
-#define V2M_CFGCTRL_START (1 << 31)
-#define V2M_CFGCTRL_RW (1 << 30)
+#define V2M_CFGCTRL_START BIT_32(31)
+#define V2M_CFGCTRL_RW BIT_32(30)
#define V2M_CFGCTRL_FUNC_SHIFT 20
-#define V2M_CFGCTRL_FUNC(fn) (fn << V2M_CFGCTRL_FUNC_SHIFT)
-#define V2M_FUNC_CLK_GEN 0x01
-#define V2M_FUNC_TEMP 0x04
-#define V2M_FUNC_DB_RESET 0x05
-#define V2M_FUNC_SCC_CFG 0x06
-#define V2M_FUNC_SHUTDOWN 0x08
-#define V2M_FUNC_REBOOT 0x09
+#define V2M_CFGCTRL_FUNC(fn) ((fn) << V2M_CFGCTRL_FUNC_SHIFT)
+#define V2M_FUNC_CLK_GEN U(0x01)
+#define V2M_FUNC_TEMP U(0x04)
+#define V2M_FUNC_DB_RESET U(0x05)
+#define V2M_FUNC_SCC_CFG U(0x06)
+#define V2M_FUNC_SHUTDOWN U(0x08)
+#define V2M_FUNC_REBOOT U(0x09)
/* NVFLAGS in the V2M motherboard which is preserved after a watchdog reset */
#define V2M_SYS_NVFLAGS_ADDR (V2M_SYSREGS_BASE + V2M_SYS_NVFLAGS)
@@ -131,4 +131,4 @@
MT_DEVICE | MT_RW | MT_SECURE | MT_USER)
-#endif /* __V2M_DEF_H__ */
+#endif /* V2M_DEF_H */
diff --git a/include/plat/marvell/a8k/common/plat_marvell.h b/include/plat/marvell/a8k/common/plat_marvell.h
index a62a7cb..2aecd3f 100644
--- a/include/plat/marvell/a8k/common/plat_marvell.h
+++ b/include/plat/marvell/a8k/common/plat_marvell.h
@@ -125,4 +125,6 @@
void marvell_exit_bootrom(uintptr_t base);
int plat_marvell_early_cpu_powerdown(void);
+int bl2_plat_handle_scp_bl2(image_info_t *scp_bl2_image_info);
+
#endif /* __PLAT_MARVELL_H__ */
diff --git a/maintainers.rst b/maintainers.rst
index 383e47b..cb4f420 100644
--- a/maintainers.rst
+++ b/maintainers.rst
@@ -81,6 +81,7 @@
:F: docs/plat/marvell/
:F: plat/marvell/
:F: drivers/marvell/
+:F: tools/doimage/
NVidia platform ports
---------------------
diff --git a/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h b/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h
index 9ad32d7..324f3e2 100644
--- a/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h
+++ b/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h
@@ -4,36 +4,36 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef __FVP_PWRC_H__
-#define __FVP_PWRC_H__
+#ifndef FVP_PWRC_H
+#define FVP_PWRC_H
/* FVP Power controller register offset etc */
-#define PPOFFR_OFF 0x0
-#define PPONR_OFF 0x4
-#define PCOFFR_OFF 0x8
-#define PWKUPR_OFF 0xc
-#define PSYSR_OFF 0x10
+#define PPOFFR_OFF U(0x0)
+#define PPONR_OFF U(0x4)
+#define PCOFFR_OFF U(0x8)
+#define PWKUPR_OFF U(0xc)
+#define PSYSR_OFF U(0x10)
-#define PWKUPR_WEN (1ULL << 31)
+#define PWKUPR_WEN BIT_32(31)
-#define PSYSR_AFF_L2 (1 << 31)
-#define PSYSR_AFF_L1 (1 << 30)
-#define PSYSR_AFF_L0 (1 << 29)
-#define PSYSR_WEN (1 << 28)
-#define PSYSR_PC (1 << 27)
-#define PSYSR_PP (1 << 26)
+#define PSYSR_AFF_L2 BIT_32(31)
+#define PSYSR_AFF_L1 BIT_32(30)
+#define PSYSR_AFF_L0 BIT_32(29)
+#define PSYSR_WEN BIT_32(28)
+#define PSYSR_PC BIT_32(27)
+#define PSYSR_PP BIT_32(26)
#define PSYSR_WK_SHIFT 24
#define PSYSR_WK_WIDTH 0x2
-#define PSYSR_WK_MASK ((1 << PSYSR_WK_WIDTH) - 1)
-#define PSYSR_WK(x) (x >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK
+#define PSYSR_WK_MASK ((1U << PSYSR_WK_WIDTH) - 1U)
+#define PSYSR_WK(x) ((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK
-#define WKUP_COLD 0x0
-#define WKUP_RESET 0x1
-#define WKUP_PPONR 0x2
-#define WKUP_GICREQ 0x3
+#define WKUP_COLD U(0x0)
+#define WKUP_RESET U(0x1)
+#define WKUP_PPONR U(0x2)
+#define WKUP_GICREQ U(0x3)
-#define PSYSR_INVALID 0xffffffff
+#define PSYSR_INVALID U(0xffffffff)
#ifndef __ASSEMBLY__
@@ -50,4 +50,4 @@
#endif /*__ASSEMBLY__*/
-#endif /* __FVP_PWRC_H__ */
+#endif /* FVP_PWRC_H */
diff --git a/plat/arm/board/fvp/fvp_def.h b/plat/arm/board/fvp/fvp_def.h
index 4e20c31..eb6f77f 100644
--- a/plat/arm/board/fvp/fvp_def.h
+++ b/plat/arm/board/fvp/fvp_def.h
@@ -97,7 +97,7 @@
#define ARCH_MODEL 0x1
/* FVP Power controller base address*/
-#define PWRC_BASE 0x1c100000
+#define PWRC_BASE UL(0x1c100000)
/* FVP SP804 timer frequency is 35 MHz*/
#define SP804_TIMER_CLKMULT 1
diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c
index 065ecc1..7b85043 100644
--- a/plat/arm/board/fvp/fvp_pm.c
+++ b/plat/arm/board/fvp/fvp_pm.c
@@ -153,7 +153,7 @@
*/
do {
psysr = fvp_pwrc_read_psysr(mpidr);
- } while (psysr & PSYSR_AFF_L0);
+ } while ((psysr & PSYSR_AFF_L0) != 0U);
fvp_pwrc_write_pponr(mpidr);
return rc;
@@ -312,7 +312,7 @@
* The format of 'power_level' is implementation-defined, but 0 must
* mean a CPU. We also allow 1 to denote the cluster
*/
- if (power_level != ARM_PWR_LVL0 && power_level != ARM_PWR_LVL1)
+ if ((power_level != ARM_PWR_LVL0) && (power_level != ARM_PWR_LVL1))
return PSCI_E_INVALID_PARAMS;
/*
@@ -325,10 +325,10 @@
return PSCI_E_INVALID_PARAMS;
if (power_level == ARM_PWR_LVL0) {
- ret = (psysr & PSYSR_AFF_L0) ? HW_ON : HW_OFF;
+ ret = ((psysr & PSYSR_AFF_L0) != 0U) ? HW_ON : HW_OFF;
} else {
/* power_level == ARM_PWR_LVL1 */
- ret = (psysr & PSYSR_AFF_L1) ? HW_ON : HW_OFF;
+ ret = ((psysr & PSYSR_AFF_L1) != 0U) ? HW_ON : HW_OFF;
}
return ret;
diff --git a/plat/arm/board/juno/platform.mk b/plat/arm/board/juno/platform.mk
index 6e137a7..e2ec3c1 100644
--- a/plat/arm/board/juno/platform.mk
+++ b/plat/arm/board/juno/platform.mk
@@ -90,6 +90,11 @@
endif
+ifneq (${RESET_TO_BL31},0)
+ $(error "Using BL31 as the reset vector is not supported on ${PLATFORM} platform. \
+ Please set RESET_TO_BL31 to 0.")
+endif
+
# Errata workarounds for Cortex-A53:
ERRATA_A53_826319 := 1
ERRATA_A53_835769 := 1
diff --git a/plat/arm/common/arm_pm.c b/plat/arm/common/arm_pm.c
index 85efc7d..6394bfb 100644
--- a/plat/arm/common/arm_pm.c
+++ b/plat/arm/common/arm_pm.c
@@ -29,7 +29,7 @@
unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
unsigned int i;
- assert(req_state > 0U);
+ assert(req_state != NULL);
if (pwr_lvl > PLAT_MAX_PWR_LVL)
return PSCI_E_INVALID_PARAMS;
@@ -72,7 +72,7 @@
unsigned int state_id;
int i;
- assert(req_state);
+ assert(req_state != NULL);
/*
* Currently we are using a linear search for finding the matching
@@ -128,7 +128,7 @@
int arm_validate_psci_entrypoint(uintptr_t entrypoint)
{
- return arm_validate_ns_entrypoint(entrypoint) == 0 ? PSCI_E_SUCCESS :
+ return (arm_validate_ns_entrypoint(entrypoint) == 0) ? PSCI_E_SUCCESS :
PSCI_E_INVALID_ADDRESS;
}
diff --git a/plat/arm/css/common/css_common.mk b/plat/arm/css/common/css_common.mk
index 984c1da..ca1edab 100644
--- a/plat/arm/css/common/css_common.mk
+++ b/plat/arm/css/common/css_common.mk
@@ -39,11 +39,6 @@
plat/arm/css/drivers/mhu/css_mhu_doorbell.c
endif
-ifneq (${RESET_TO_BL31},0)
- $(error "Using BL31 as the reset vector is not supported on CSS platforms. \
- Please set RESET_TO_BL31 to 0.")
-endif
-
# Process CSS_LOAD_SCP_IMAGES flag
$(eval $(call assert_boolean,CSS_LOAD_SCP_IMAGES))
$(eval $(call add_define,CSS_LOAD_SCP_IMAGES))
diff --git a/plat/arm/css/sgi/sgi-common.mk b/plat/arm/css/sgi/sgi-common.mk
index 28f97b1..24f03dd 100644
--- a/plat/arm/css/sgi/sgi-common.mk
+++ b/plat/arm/css/sgi/sgi-common.mk
@@ -67,6 +67,11 @@
# Add the HW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config))
+ifneq (${RESET_TO_BL31},0)
+ $(error "Using BL31 as the reset vector is not supported on ${PLATFORM} platform. \
+ Please set RESET_TO_BL31 to 0.")
+endif
+
$(eval $(call add_define,SGI_PLAT))
override CSS_LOAD_SCP_IMAGES := 0
diff --git a/plat/arm/css/sgm/sgm-common.mk b/plat/arm/css/sgm/sgm-common.mk
index b10e14c..3eb4840 100644
--- a/plat/arm/css/sgm/sgm-common.mk
+++ b/plat/arm/css/sgm/sgm-common.mk
@@ -45,6 +45,11 @@
${CSS_SGM_BASE}/sgm_bl31_setup.c \
${CSS_SGM_BASE}/sgm_plat_config.c
+ifneq (${RESET_TO_BL31},0)
+ $(error "Using BL31 as the reset vector is not supported on ${PLATFORM} platform. \
+ Please set RESET_TO_BL31 to 0.")
+endif
+
# sgm uses CCI-500 as Cache Coherent Interconnect
ARM_CCI_PRODUCT_ID := 500
diff --git a/plat/arm/css/sgm/sgm_bl1_setup.c b/plat/arm/css/sgm/sgm_bl1_setup.c
index 51e3e53..dc3d71d 100644
--- a/plat/arm/css/sgm/sgm_bl1_setup.c
+++ b/plat/arm/css/sgm/sgm_bl1_setup.c
@@ -12,11 +12,13 @@
void bl1_early_platform_setup(void)
{
- /* Initialize the platform configuration structure */
- plat_config_init();
+ /* Initialize the console before anything else */
arm_bl1_early_platform_setup();
+ /* Initialize the platform configuration structure */
+ plat_config_init();
+
#if !HW_ASSISTED_COHERENCY
/*
* Initialize Interconnect for this cluster during cold boot.
diff --git a/plat/marvell/common/marvell_bl2_setup.c b/plat/marvell/common/marvell_bl2_setup.c
index f7149c3..d33aba4 100644
--- a/plat/marvell/common/marvell_bl2_setup.c
+++ b/plat/marvell/common/marvell_bl2_setup.c
@@ -105,7 +105,15 @@
bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr();
bl_mem_params->ep_info.spsr = marvell_get_spsr_for_bl33_entry();
break;
-
+#ifdef SCP_BL2_BASE
+ case SCP_BL2_IMAGE_ID:
+ /* The subsequent handling of SCP_BL2 is platform specific */
+ err = bl2_plat_handle_scp_bl2(&bl_mem_params->image_info);
+ if (err) {
+ WARN("Failure in platform-specific handling of SCP_BL2 image.\n");
+ }
+ break;
+#endif
default:
/* Do nothing in default case */
break;
diff --git a/tools/cert_create/Makefile b/tools/cert_create/Makefile
index 7b10e3e..c03629a 100644
--- a/tools/cert_create/Makefile
+++ b/tools/cert_create/Makefile
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -22,7 +22,7 @@
src/tbbr/tbb_ext.o \
src/tbbr/tbb_key.o
-CFLAGS := -Wall -std=c99
+HOSTCCFLAGS := -Wall -std=c99
MAKE_HELPERS_DIRECTORY := ../../make_helpers/
include ${MAKE_HELPERS_DIRECTORY}build_macros.mk
@@ -46,9 +46,9 @@
endif
ifeq (${DEBUG},1)
- CFLAGS += -g -O0 -DDEBUG -DLOG_LEVEL=40
+ HOSTCCFLAGS += -g -O0 -DDEBUG -DLOG_LEVEL=40
else
- CFLAGS += -O2 -DLOG_LEVEL=20
+ HOSTCCFLAGS += -O2 -DLOG_LEVEL=20
endif
ifeq (${V},0)
Q := @
@@ -57,7 +57,7 @@
endif
$(eval $(call add_define,USE_TBBR_DEFS))
-CFLAGS += ${DEFINES}
+HOSTCCFLAGS += ${DEFINES}
# Make soft links and include from local directory otherwise wrong headers
# could get pulled in from firmware tree.
@@ -72,15 +72,15 @@
all: clean ${BINARY}
${BINARY}: ${OBJECTS} Makefile
- @echo " LD $@"
+ @echo " HOSTLD $@"
@echo 'const char build_msg[] = "Built : "__TIME__", "__DATE__; \
const char platform_msg[] = "${PLAT_MSG}";' | \
- ${HOSTCC} -c ${CFLAGS} -xc - -o src/build_msg.o
+ ${HOSTCC} -c ${HOSTCCFLAGS} -xc - -o src/build_msg.o
${Q}${HOSTCC} src/build_msg.o ${OBJECTS} ${LIB_DIR} ${LIB} -o $@
%.o: %.c
- @echo " CC $<"
- ${Q}${HOSTCC} -c ${CFLAGS} ${INC_DIR} $< -o $@
+ @echo " HOSTCC $<"
+ ${Q}${HOSTCC} -c ${HOSTCCFLAGS} ${INC_DIR} $< -o $@
clean:
$(call SHELL_DELETE_ALL, src/build_msg.o ${OBJECTS})
diff --git a/tools/doimage/Makefile b/tools/doimage/Makefile
index 9cec681..9f0d89d 100644
--- a/tools/doimage/Makefile
+++ b/tools/doimage/Makefile
@@ -7,11 +7,11 @@
PROJECT = doimage
OBJECTS = doimage.o
-CFLAGS = -Wall -Werror
+HOSTCCFLAGS = -Wall -Werror
ifeq (${DEBUG},1)
- CFLAGS += -g -O0 -DDEBUG
+ HOSTCCFLAGS += -g -O0 -DDEBUG
else
- CFLAGS += -O2
+ HOSTCCFLAGS += -O2
endif
ifeq (${MARVELL_SECURE_BOOT},1)
@@ -19,13 +19,13 @@
DOIMAGE_LD_FLAGS := -lconfig -lmbedtls -lmbedcrypto -lmbedx509
endif
-CFLAGS += ${DOIMAGE_CC_FLAGS}
+HOSTCCFLAGS += ${DOIMAGE_CC_FLAGS}
# Make soft links and include from local directory otherwise wrong headers
# could get pulled in from firmware tree.
INCLUDE_PATHS = -I.
-CC := gcc
+HOSTCC ?= gcc
RM := rm -rf
.PHONY: all clean
@@ -33,15 +33,15 @@
all: ${PROJECT}
${PROJECT}: ${OBJECTS} Makefile
- @echo " LD $@"
- ${Q}${CC} ${OBJECTS} ${DOIMAGE_LD_FLAGS} -o $@
+ @echo " HOSTLD $@"
+ ${Q}${HOSTCC} ${OBJECTS} ${DOIMAGE_LD_FLAGS} -o $@
@echo
@echo "Built $@ successfully"
@echo
%.o: %.c Makefile
- @echo " CC $<"
- ${Q}${CC} -c ${CFLAGS} ${INCLUDE_PATHS} $< -o $@
+ @echo " HOSTCC $<"
+ ${Q}${HOSTCC} -c ${HOSTCCFLAGS} ${INCLUDE_PATHS} $< -o $@
clean:
${Q}${RM} ${PROJECT}
diff --git a/tools/doimage/doimage.c b/tools/doimage/doimage.c
index 6fc23d5..82fd375 100644
--- a/tools/doimage/doimage.c
+++ b/tools/doimage/doimage.c
@@ -216,7 +216,7 @@
}
/* globals */
-options_t opts = {
+static options_t opts = {
.bin_ext_file = "NA",
.sec_cfg_file = "NA",
.sec_opts = 0,
@@ -1578,9 +1578,9 @@
int main(int argc, char *argv[])
{
- char in_file[MAX_FILENAME+1];
- char out_file[MAX_FILENAME+1];
- char ext_file[MAX_FILENAME+1];
+ char in_file[MAX_FILENAME+1] = { 0 };
+ char out_file[MAX_FILENAME+1] = { 0 };
+ char ext_file[MAX_FILENAME+1] = { 0 };
FILE *in_fd = NULL;
FILE *out_fd = NULL;
int parse = 0;
@@ -1590,6 +1590,7 @@
int image_size;
uint8_t *image_buf = NULL;
int read;
+ size_t len;
uint32_t nand_block_size_kb, mlc_nand;
/* Create temporary file for building extensions
@@ -1660,13 +1661,19 @@
if (optind >= argc)
usage_err("missing input file name");
- strncpy(in_file, argv[optind], MAX_FILENAME);
+ len = strlen(argv[optind]);
+ if (len > MAX_FILENAME)
+ usage_err("file name too long");
+ memcpy(in_file, argv[optind], len);
optind++;
/* Output file must exist in non parse mode */
- if (optind < argc)
- strncpy(out_file, argv[optind], MAX_FILENAME);
- else if (!parse)
+ if (optind < argc) {
+ len = strlen(argv[optind]);
+ if (len > MAX_FILENAME)
+ usage_err("file name too long");
+ memcpy(out_file, argv[optind], len);
+ } else if (!parse)
usage_err("missing output file name");
/* open the input file */
diff --git a/tools/fiptool/Makefile b/tools/fiptool/Makefile
index 9bdafe0..ef35014 100644
--- a/tools/fiptool/Makefile
+++ b/tools/fiptool/Makefile
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -13,11 +13,11 @@
V ?= 0
override CPPFLAGS += -D_GNU_SOURCE -D_XOPEN_SOURCE=700
-CFLAGS := -Wall -Werror -pedantic -std=c99
+HOSTCCFLAGS := -Wall -Werror -pedantic -std=c99
ifeq (${DEBUG},1)
- CFLAGS += -g -O0 -DDEBUG
+ HOSTCCFLAGS += -g -O0 -DDEBUG
else
- CFLAGS += -O2
+ HOSTCCFLAGS += -O2
endif
LDLIBS := -lcrypto
@@ -36,15 +36,15 @@
all: ${PROJECT}
${PROJECT}: ${OBJECTS} Makefile
- @echo " LD $@"
+ @echo " HOSTLD $@"
${Q}${HOSTCC} ${OBJECTS} -o $@ ${LDLIBS}
@${ECHO_BLANK_LINE}
@echo "Built $@ successfully"
@${ECHO_BLANK_LINE}
%.o: %.c %.h Makefile
- @echo " CC $<"
- ${Q}${HOSTCC} -c ${CPPFLAGS} ${CFLAGS} ${INCLUDE_PATHS} $< -o $@
+ @echo " HOSTCC $<"
+ ${Q}${HOSTCC} -c ${CPPFLAGS} ${HOSTCCFLAGS} ${INCLUDE_PATHS} $< -o $@
clean:
$(call SHELL_DELETE_ALL, ${PROJECT} ${OBJECTS})
diff --git a/tools/stm32image/Makefile b/tools/stm32image/Makefile
index a593d31..9c9b7b5 100644
--- a/tools/stm32image/Makefile
+++ b/tools/stm32image/Makefile
@@ -12,11 +12,12 @@
OBJECTS := stm32image.o
V := 0
-CFLAGS := -Wall -Werror -pedantic -std=c99 -D_GNU_SOURCE
+HOSTCCFLAGS := -Wall -Werror -pedantic -std=c99 -D_GNU_SOURCE
+
ifeq (${DEBUG},1)
- CFLAGS += -g -O0 -DDEBUG
+ HOSTCCFLAGS += -g -O0 -DDEBUG
else
- CFLAGS += -O2
+ HOSTCCFLAGS += -O2
endif
ifeq (${V},0)
@@ -25,22 +26,22 @@
Q :=
endif
-CC := gcc
+HOSTCC := gcc
.PHONY: all clean distclean
all: ${PROJECT}
${PROJECT}: ${OBJECTS} Makefile
- @echo " LD $@"
- ${Q}${CC} ${OBJECTS} -o $@
+ @echo " HOSTLD $@"
+ ${Q}${HOSTCC} ${OBJECTS} -o $@
@${ECHO_BLANK_LINE}
@echo "Built $@ successfully"
@${ECHO_BLANK_LINE}
%.o: %.c Makefile
- @echo " CC $<"
- ${Q}${CC} -c ${CFLAGS} $< -o $@
+ @echo " HOSTCC $<"
+ ${Q}${HOSTCC} -c ${HOSTCCFLAGS} $< -o $@
clean:
$(call SHELL_DELETE_ALL, ${PROJECT} ${OBJECTS})