Merge changes I54d18f01,I4e06c8a7,Ib5fc7dcd,Id5db5558,Ib941a04a into integration
* changes:
feat(st): adapt .stm32 file creation for clang
feat(st): adapt stm32 linker scripts for clang
feat(st): update stm32 linker scripts
fix(st): mark INCBIN-generated sections as SHF_ALLOC
feat(st): remove unsupported option for clang
diff --git a/plat/st/common/common.mk b/plat/st/common/common.mk
index 4dbb949..56a8814 100644
--- a/plat/st/common/common.mk
+++ b/plat/st/common/common.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved
+# Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved
# Copyright (c) 2025, Arm Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -27,7 +27,10 @@
STM32_HEADER_BL2_BINARY_TYPE := 0x10
TF_CFLAGS += -Wsign-compare
+ifeq ($(findstring clang,$(notdir $(CC))),)
+# Only for GCC
TF_CFLAGS += -Wformat-signedness
+endif
# Number of TF-A copies in the device
STM32_TF_A_COPIES := 2
diff --git a/plat/st/common/common_rules.mk b/plat/st/common/common_rules.mk
index 88c1087..bb7e3c5 100644
--- a/plat/st/common/common_rules.mk
+++ b/plat/st/common/common_rules.mk
@@ -71,8 +71,13 @@
tf-a-%.stm32: tf-a-%.bin ${STM32_DEPS}
$(s)echo
$(s)echo "Generate $@"
+ifeq ($($(ARCH)-ld-id),llvm-lld)
+ $(eval LOADADDR = 0x$(shell cat $(@:.stm32=.map) | grep '\.data$$' | awk '{print $$1}'))
+ $(eval ENTRY = 0x$(shell cat $(@:.stm32=.map) | grep "__BL2_IMAGE_START" | awk '{print $$1}'))
+else
$(eval LOADADDR = $(shell cat $(@:.stm32=.map) | grep '^RAM' | awk '{print $$2}'))
$(eval ENTRY = $(shell cat $(@:.stm32=.map) | grep "__BL2_IMAGE_START" | awk '{print $$1}'))
+endif
$(q)${STM32IMAGE} -s $< -d $@ \
-l $(LOADADDR) -e ${ENTRY} \
-v ${STM32_TF_VERSION} \
diff --git a/plat/st/stm32mp1/stm32mp1.S b/plat/st/stm32mp1/stm32mp1.S
index aee4f0e..a688f4d 100644
--- a/plat/st/stm32mp1/stm32mp1.S
+++ b/plat/st/stm32mp1/stm32mp1.S
@@ -1,11 +1,11 @@
/*
- * Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-.section .bl2_image
+.section .bl2_image, "a"
.incbin BL2_BIN_PATH
-.section .dtb_image
+.section .dtb_image, "a"
.incbin DTB_BIN_PATH
diff --git a/plat/st/stm32mp1/stm32mp1.ld.S b/plat/st/stm32mp1/stm32mp1.ld.S
index 1be8219..c9d9873 100644
--- a/plat/st/stm32mp1/stm32mp1.ld.S
+++ b/plat/st/stm32mp1/stm32mp1.ld.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -33,17 +33,17 @@
} >HEADER
. = STM32MP_BINARY_BASE;
- .data . : {
+ .data : {
. = ALIGN(PAGE_SIZE);
__DATA_START__ = .;
- *(.data*)
+ FILL(0);
/*
* dtb.
* The strongest and only alignment contraint is MMU 4K page.
* Indeed as images below will be removed, 4K pages will be re-used.
*/
- . = ( STM32MP_BL2_DTB_BASE - STM32MP_BINARY_BASE );
+ . = ABSOLUTE( STM32MP_BL2_DTB_BASE );
__DTB_IMAGE_START__ = .;
*(.dtb_image*)
__DTB_IMAGE_END__ = .;
@@ -54,9 +54,9 @@
* Indeed as images below will be removed, 4K pages will be re-used.
*/
#if SEPARATE_CODE_AND_RODATA
- . = ( STM32MP_BL2_RO_BASE - STM32MP_BINARY_BASE );
+ . = ABSOLUTE( STM32MP_BL2_RO_BASE );
#else
- . = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE );
+ . = ABSOLUTE( STM32MP_BL2_BASE );
#endif
__BL2_IMAGE_START__ = .;
*(.bl2_image*)
diff --git a/plat/st/stm32mp2/aarch64/stm32mp2.S b/plat/st/stm32mp2/aarch64/stm32mp2.S
index 1866b8b..6c32972 100644
--- a/plat/st/stm32mp2/aarch64/stm32mp2.S
+++ b/plat/st/stm32mp2/aarch64/stm32mp2.S
@@ -1,11 +1,11 @@
/*
- * Copyright (c) 2023, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-.section .bl2_image
+.section .bl2_image, "a"
.incbin BL2_BIN_PATH
-.section .dtb_image
+.section .dtb_image, "a"
.incbin DTB_BIN_PATH
diff --git a/plat/st/stm32mp2/aarch64/stm32mp2.ld.S b/plat/st/stm32mp2/aarch64/stm32mp2.ld.S
index 48bf424..cf71f27 100644
--- a/plat/st/stm32mp2/aarch64/stm32mp2.ld.S
+++ b/plat/st/stm32mp2/aarch64/stm32mp2.ld.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2023, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2023-2025, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -33,17 +33,17 @@
} >HEADER
. = STM32MP_BINARY_BASE;
- .data . : {
+ .data : {
. = ALIGN(PAGE_SIZE);
__DATA_START__ = .;
- *(.data*)
+ FILL(0);
/*
* dtb.
* The strongest and only alignment contraint is MMU 4K page.
* Indeed as images below will be removed, 4K pages will be re-used.
*/
- . = ( STM32MP_BL2_DTB_BASE - STM32MP_BINARY_BASE );
+ . = ABSOLUTE( STM32MP_BL2_DTB_BASE );
__DTB_IMAGE_START__ = .;
*(.dtb_image*)
__DTB_IMAGE_END__ = .;
@@ -54,9 +54,9 @@
* Indeed as images below will be removed, 4K pages will be re-used.
*/
#if SEPARATE_CODE_AND_RODATA
- . = ( STM32MP_BL2_RO_BASE - STM32MP_BINARY_BASE );
+ . = ABSOLUTE( STM32MP_BL2_RO_BASE );
#else
- . = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE );
+ . = ABSOLUTE( STM32MP_BL2_BASE );
#endif
__BL2_IMAGE_START__ = .;
*(.bl2_image*)