fix(intel): update FCS AES method for GCM block modes
On the Agilex5 platform, AES enc/dec with GCM and GCM-GHASH
modes, the source and destination size should be in multiples
of 16 bytes. For other platforms and other modes, it should
be in multiples of 32 bytes.
Change-Id: I0fa9adafb5d7fc4c794a4acb9339cf8259df0c78
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>
diff --git a/plat/intel/soc/common/include/socfpga_fcs.h b/plat/intel/soc/common/include/socfpga_fcs.h
index f92678f..97ea850 100644
--- a/plat/intel/soc/common/include/socfpga_fcs.h
+++ b/plat/intel/soc/common/include/socfpga_fcs.h
@@ -362,7 +362,7 @@
uint32_t session_id, uint32_t context_id,
uint64_t src_addr, uint32_t src_size,
uint64_t dst_addr, uint32_t dst_size,
- uint32_t aad_size, uint8_t is_finalised,
+ uint32_t padding_size, uint8_t is_finalised,
uint32_t *send_id, uint64_t smmu_src_addr,
uint64_t smmu_dst_addr);