fix(xilinx): add FIT image check in prepare_dtb
Introduce two new functions: 'is_valid_image()' and 'is_fit_image()'
to enhance the functionality of the system. 'is_valid_image()' will
verify the presence of the FDT header and ensure that the FDT is
open. Meanwhile, 'is_fit_image()' will be responsible for detecting
FIT images. When TF-A is built with a DTB address during compilation
and later executed from DDR memory, TF-A will dynamically reserve a
memory location in the DTB during runtime.
This approach is effective when a raw DTB is present at the specified
address location. With this change, the "is_fit_image()" function
has been introduced to verify the existence of the "/configurations"
property within the DTB.
The presence of this property is exclusive to FIT images. In case
the property is found, a warning message is displayed, and memory
space reservation for its address space in DDR is not performed by
TF-A. However, if the property is not present, TF-A continues its
usual procedure of updating the raw DTB.
Additionally, dynamic mapping has been refactored and separated into
distinct functions: "add_mmap_dynamic_region ()" and
"remove_dynamic_mmap()". This separation enhances compatibility
and maintains better code organization.
Change-Id: I9cd3f09863b44483445e58c802dee34d58dfe2e9
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
diff --git a/plat/xilinx/common/include/plat_fdt.h b/plat/xilinx/common/include/plat_fdt.h
index a1ee1e1..47a678c 100644
--- a/plat/xilinx/common/include/plat_fdt.h
+++ b/plat/xilinx/common/include/plat_fdt.h
@@ -9,4 +9,8 @@
void prepare_dtb(void);
+#if defined(XILINX_OF_BOARD_DTB_ADDR)
+int32_t is_valid_dtb(void *fdt);
+#endif
+
#endif /* PLAT_FDT_H */
diff --git a/plat/xilinx/common/plat_fdt.c b/plat/xilinx/common/plat_fdt.c
index de5d1a1..ebcc31b 100644
--- a/plat/xilinx/common/plat_fdt.c
+++ b/plat/xilinx/common/plat_fdt.c
@@ -13,6 +13,79 @@
#include <plat_fdt.h>
#include <platform_def.h>
+#if defined(XILINX_OF_BOARD_DTB_ADDR)
+
+#define FIT_CONFS_PATH "/configurations"
+
+static uint8_t is_fit_image(void *dtb)
+{
+ int64_t confs_noffset;
+ uint8_t status = 0;
+
+ confs_noffset = fdt_path_offset(dtb, FIT_CONFS_PATH);
+ /*confs_noffset is only present on FIT image */
+ if (confs_noffset < 0) {
+ status = 0;
+ } else {
+ status = 1;
+ }
+
+ return status;
+}
+
+int32_t is_valid_dtb(void *fdt)
+{
+ int32_t ret = 0;
+
+ if (fdt_check_header(fdt) != 0) {
+ ERROR("Can't read DT at %p\n", fdt);
+ ret = -FDT_ERR_NOTFOUND;
+ goto error;
+ }
+
+ ret = fdt_open_into(fdt, fdt, XILINX_OF_BOARD_DTB_MAX_SIZE);
+ if (ret < 0) {
+ ERROR("Invalid Device Tree at %p: error %d\n", fdt, ret);
+ ret = -FDT_ERR_NOTFOUND;
+ goto error;
+ }
+
+ if (is_fit_image(fdt) != 0U) {
+ WARN("FIT image detected, TF-A will not update DTB for DDR address space\n");
+ ret = -FDT_ERR_NOTFOUND;
+ }
+error:
+ return ret;
+}
+
+static int add_mmap_dynamic_region(unsigned long long base_pa, uintptr_t base_va,
+ size_t size, unsigned int attr)
+{
+ int ret = 0;
+#if defined(PLAT_XLAT_TABLES_DYNAMIC)
+ ret = mmap_add_dynamic_region(base_pa, base_va, size, attr);
+ if (ret != 0) {
+ WARN("Failed to add dynamic region for dtb: error %d\n",
+ ret);
+ }
+#endif
+ return ret;
+}
+
+static int remove_mmap_dynamic_region(uintptr_t base_va, size_t size)
+{
+ int ret = 0;
+#if defined(PLAT_XLAT_TABLES_DYNAMIC)
+ ret = mmap_remove_dynamic_region(base_va, size);
+ if (ret != 0) {
+ WARN("Failed to remove dynamic region for dtb:error %d\n",
+ ret);
+ }
+#endif
+ return ret;
+}
+#endif
+
void prepare_dtb(void)
{
#if defined(XILINX_OF_BOARD_DTB_ADDR)
@@ -24,75 +97,44 @@
if (!IS_TFA_IN_OCM(BL31_BASE)) {
-#if defined(PLAT_XLAT_TABLES_DYNAMIC)
- map_ret = mmap_add_dynamic_region((unsigned long long)dtb,
- (uintptr_t)dtb,
- XILINX_OF_BOARD_DTB_MAX_SIZE,
- MT_MEMORY | MT_RW | MT_NS);
- if (map_ret != 0) {
- WARN("Failed to add dynamic region for dtb: error %d\n",
- map_ret);
- }
-#endif
-
- if (!map_ret) {
+ map_ret = add_mmap_dynamic_region((unsigned long long)dtb,
+ (uintptr_t)dtb,
+ XILINX_OF_BOARD_DTB_MAX_SIZE,
+ MT_MEMORY | MT_RW | MT_NS);
+ if (map_ret == 0) {
/* Return if no device tree is detected */
- if (fdt_check_header(dtb) != 0) {
- NOTICE("Can't read DT at %p\n", dtb);
- } else {
- ret = fdt_open_into(dtb, dtb, XILINX_OF_BOARD_DTB_MAX_SIZE);
-
- if (ret < 0) {
- ERROR("Invalid Device Tree at %p: error %d\n",
- dtb, ret);
- } else {
-
- if (dt_add_psci_node(dtb)) {
- WARN("Failed to add PSCI Device Tree node\n");
- }
-
- if (dt_add_psci_cpu_enable_methods(dtb)) {
- WARN("Failed to add PSCI cpu enable methods in DT\n");
- }
-
- /* Reserve memory used by Trusted Firmware. */
- ret = fdt_add_reserved_memory(dtb,
- "tf-a",
- BL31_BASE,
- BL31_LIMIT
- -
- BL31_BASE);
- if (ret < 0) {
- WARN("Failed to add reserved memory nodes for BL31 to DT.\n");
- }
-
- ret = fdt_pack(dtb);
- if (ret < 0) {
- WARN("Failed to pack dtb at %p: error %d\n",
- dtb, ret);
- }
- flush_dcache_range((uintptr_t)dtb,
- fdt_blob_size(dtb));
+ if (is_valid_dtb(dtb) == 0) {
+ if (dt_add_psci_node(dtb)) {
+ WARN("Failed to add PSCI Device Tree node\n");
+ }
- INFO("Changed device tree to advertise PSCI and reserved memories.\n");
+ if (dt_add_psci_cpu_enable_methods(dtb)) {
+ WARN("Failed to add PSCI cpu enable methods in DT\n");
+ }
+ /* Reserve memory used by Trusted Firmware. */
+ ret = fdt_add_reserved_memory(dtb, "tf-a",
+ BL31_BASE,
+ BL31_LIMIT - BL31_BASE);
+ if (ret < 0) {
+ WARN("Failed to add reserved memory nodes for BL31 to DT.\n");
}
- }
- }
+ ret = fdt_pack(dtb);
+ if (ret < 0) {
+ WARN("Failed to pack dtb at %p: error %d\n", dtb, ret);
+ }
+ flush_dcache_range((uintptr_t)dtb, fdt_blob_size(dtb));
+ INFO("Changed device tree to advertise PSCI and reserved memories.\n");
+ }
-#if defined(PLAT_XLAT_TABLES_DYNAMIC)
- if (!map_ret) {
- ret = mmap_remove_dynamic_region((uintptr_t)dtb,
- XILINX_OF_BOARD_DTB_MAX_SIZE);
+ ret = remove_mmap_dynamic_region((uintptr_t)dtb,
+ XILINX_OF_BOARD_DTB_MAX_SIZE);
if (ret != 0) {
- WARN("Failed to remove dynamic region for dtb:error %d\n",
- ret);
+ WARN("Failed to remove mmap dynamic regions.\n");
}
}
-#endif
}
-
#endif
}