fix(gicv3): update the affinity mask to 8 bit
The GIC ICC_SGI0R_EL1 register's affinity fields are 8bit wide for GIC
v3 and v4. Fix the SGIR_AFF_MASK variable accordingly.
Change-Id: I09f3fdd006708b40162776620f82abcfc6c3f782
Signed-off-by: Pranav Madhu <pranav.madhu@arm.com>
diff --git a/include/drivers/arm/gicv3.h b/include/drivers/arm/gicv3.h
index 8371dd5..860ea7a 100644
--- a/include/drivers/arm/gicv3.h
+++ b/include/drivers/arm/gicv3.h
@@ -315,7 +315,7 @@
#define SGIR_IRM_SHIFT 40
#define SGIR_IRM_MASK ULL(0x1)
#define SGIR_AFF3_SHIFT 48
-#define SGIR_AFF_MASK ULL(0xf)
+#define SGIR_AFF_MASK ULL(0xff)
#define SGIR_IRM_TO_AFF U(0)