fix(intel): update individual return result for hps and fpga bridges
The code is designed to execute SOC2FPGA and LWSOC2FPGA first
then to F2SOC and both sharing the same result "return".
Thus when F2SOC is executed, the "return" result will overwrite
SOC2FPGA "return" result even though it is not enabled.
Using 2 different "return" result to for each bridges and
return both of them at the end of the function to
avoid being overwritten.
Change-Id: Id9de3f416fe3020db35bc946135b175be2a7dc1e
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
diff --git a/plat/intel/soc/common/soc/socfpga_reset_manager.c b/plat/intel/soc/common/soc/socfpga_reset_manager.c
index 7db86c7..bd63e02 100644
--- a/plat/intel/soc/common/soc/socfpga_reset_manager.c
+++ b/plat/intel/soc/common/soc/socfpga_reset_manager.c
@@ -407,6 +407,7 @@
int socfpga_bridges_enable(uint32_t mask)
{
int ret = 0;
+ int ret_hps = 0;
uint32_t brg_mask = 0;
uint32_t noc_mask = 0;
uint32_t f2s_idlereq = 0;
@@ -505,9 +506,9 @@
mmio_clrbits_32(SOCFPGA_RSTMGR(BRGMODRST), brg_mask);
/* Wait until idle ack becomes 0 */
- ret = poll_idle_status(SOCFPGA_SYSMGR(NOC_IDLEACK),
+ ret_hps = poll_idle_status(SOCFPGA_SYSMGR(NOC_IDLEACK),
noc_mask, 0, 300);
- if (ret < 0) {
+ if (ret_hps < 0) {
ERROR("S2F bridge enable: Timeout idle ack\n");
}
}
@@ -711,6 +712,7 @@
udelay(5);
}
#endif
+ ret = ret | ret_hps;
return ret;
}