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git01.mediatek.com / filogic / atf / 0b7f1b0ca7305467da470dd03956239589c05aba / . / plat / xilinx / versal_net
tree: 45797bc8d56f0fc7778a21350ec0bfb1dc967e03 [path history] [tgz]
  1. aarch64/
  2. include/
  3. pm_service/
  4. bl31_versal_net_setup.c
  5. plat_psci.c
  6. plat_psci_pm.c
  7. plat_topology.c
  8. platform.mk
  9. sip_svc_setup.c
  10. versal_net_gicv3.c
  11. versal_net_ipi.c