fix(psci): check if a core is the last one in a requested power level
PSCI OS initiated is usually implemented with the extended state id
format, however this does not have to be the case. When this is the
case, the original format will carry the requested power level in
the PowerLevel field. To validate that the requested power state is
valid we must save it so that later when we call
psci_is_last_cpu_to_idle_at_pwrlvl() it checks the right level (instead
of a default 0).
This came up when testing 01959a1656a08dacd1d036d0441165d52bf7563e for
all configurations.
Change-Id: Iaab88c1910467282ae524861446283acddd9d977
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
diff --git a/plat/arm/common/arm_pm.c b/plat/arm/common/arm_pm.c
index 498dedf..3e6c9f2 100644
--- a/plat/arm/common/arm_pm.c
+++ b/plat/arm/common/arm_pm.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -56,6 +56,10 @@
if (psci_get_pstate_id(power_state) != 0U)
return PSCI_E_INVALID_PARAMS;
+#if PSCI_OS_INIT_MODE
+ req_state->last_at_pwrlvl = psci_get_pstate_pwrlvl(power_state);
+#endif /* __PSCI_OS_INIT_MODE__ */
+
return PSCI_E_SUCCESS;
}