refactor(spm-mm): reorganize secure partition manager shim code

In preparation for adding the support for SEL0 SP in EL3 SPMC,
restructure the existing SPM_MM shim code in a way that allows reuse
of the code for both SPM_MM interface and FF-A EL3 SPMC interface. The
code for changing exception levels is identical for both.

With this restructuring of the code, the shim exception code is moved to
the common sub-directory.

Signed-off-by: Sayanta Pattanayak <sayanta.pattanayak@arm.com>
Signed-off-by: Nishant Sharma <nishant.sharma@arm.com>
Change-Id: Iadda9cf73f12b56e6a1d31fc21b5ba5dc355867f
diff --git a/services/std_svc/spm/spm_mm/aarch64/spm_mm_shim_exceptions.S b/services/std_svc/spm/spm_mm/aarch64/spm_mm_shim_exceptions.S
deleted file mode 100644
index 836f75c..0000000
--- a/services/std_svc/spm/spm_mm/aarch64/spm_mm_shim_exceptions.S
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <arch.h>
-#include <asm_macros.S>
-#include <common/bl_common.h>
-#include <context.h>
-
-/* -----------------------------------------------------------------------------
- * Very simple stackless exception handlers used by the spm shim layer.
- * -----------------------------------------------------------------------------
- */
-	.globl	spm_shim_exceptions_ptr
-
-vector_base spm_shim_exceptions_ptr, .spm_shim_exceptions
-
-	/* -----------------------------------------------------
-	 * Current EL with SP0 : 0x0 - 0x200
-	 * -----------------------------------------------------
-	 */
-vector_entry SynchronousExceptionSP0, .spm_shim_exceptions
-	b	.
-end_vector_entry SynchronousExceptionSP0
-
-vector_entry IrqSP0, .spm_shim_exceptions
-	b	.
-end_vector_entry IrqSP0
-
-vector_entry FiqSP0, .spm_shim_exceptions
-	b	.
-end_vector_entry FiqSP0
-
-vector_entry SErrorSP0, .spm_shim_exceptions
-	b	.
-end_vector_entry SErrorSP0
-
-	/* -----------------------------------------------------
-	 * Current EL with SPx: 0x200 - 0x400
-	 * -----------------------------------------------------
-	 */
-vector_entry SynchronousExceptionSPx, .spm_shim_exceptions
-	b	.
-end_vector_entry SynchronousExceptionSPx
-
-vector_entry IrqSPx, .spm_shim_exceptions
-	b	.
-end_vector_entry IrqSPx
-
-vector_entry FiqSPx, .spm_shim_exceptions
-	b	.
-end_vector_entry FiqSPx
-
-vector_entry SErrorSPx, .spm_shim_exceptions
-	b	.
-end_vector_entry SErrorSPx
-
-	/* -----------------------------------------------------
-	 * Lower EL using AArch64 : 0x400 - 0x600. No exceptions
-	 * are handled since secure_partition does not implement
-	 * a lower EL
-	 * -----------------------------------------------------
-	 */
-vector_entry SynchronousExceptionA64, .spm_shim_exceptions
-	msr	tpidr_el1, x30
-	mrs	x30, esr_el1
-	ubfx	x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH
-
-	cmp	x30, #EC_AARCH64_SVC
-	b.eq 	do_smc
-
-	cmp	x30, #EC_AARCH32_SVC
-	b.eq	do_smc
-
-	cmp	x30, #EC_AARCH64_SYS
-	b.eq	handle_sys_trap
-
-	/* Fail in all the other cases */
-	b	panic
-
-	/* ---------------------------------------------
-	 * Tell SPM that we are done initialising
-	 * ---------------------------------------------
-	 */
-do_smc:
-	mrs	x30, tpidr_el1
-	smc	#0
-	exception_return
-
-	/* AArch64 system instructions trap are handled as a panic for now */
-handle_sys_trap:
-panic:
-	b	panic
-end_vector_entry SynchronousExceptionA64
-
-vector_entry IrqA64, .spm_shim_exceptions
-	b	.
-end_vector_entry IrqA64
-
-vector_entry FiqA64, .spm_shim_exceptions
-	b	.
-end_vector_entry FiqA64
-
-vector_entry SErrorA64, .spm_shim_exceptions
-	b	.
-end_vector_entry SErrorA64
-
-	/* -----------------------------------------------------
-	 * Lower EL using AArch32 : 0x600 - 0x800
-	 * -----------------------------------------------------
-	 */
-vector_entry SynchronousExceptionA32, .spm_shim_exceptions
-	b	.
-end_vector_entry SynchronousExceptionA32
-
-vector_entry IrqA32, .spm_shim_exceptions
-	b	.
-end_vector_entry IrqA32
-
-vector_entry FiqA32, .spm_shim_exceptions
-	b	.
-end_vector_entry FiqA32
-
-vector_entry SErrorA32, .spm_shim_exceptions
-	b	.
-end_vector_entry SErrorA32
diff --git a/services/std_svc/spm/spm_mm/spm_mm.mk b/services/std_svc/spm/spm_mm/spm_mm.mk
index 513e8ef..cbc7940 100644
--- a/services/std_svc/spm/spm_mm/spm_mm.mk
+++ b/services/std_svc/spm/spm_mm/spm_mm.mk
@@ -21,7 +21,6 @@
 endif
 
 SPM_MM_SOURCES	:=	$(addprefix services/std_svc/spm/spm_mm/,	\
-			${ARCH}/spm_mm_shim_exceptions.S		\
 			spm_mm_main.c					\
 			spm_mm_setup.c					\
 			spm_mm_xlat.c)
diff --git a/services/std_svc/spm/spm_mm/spm_mm_setup.c b/services/std_svc/spm/spm_mm/spm_mm_setup.c
index 04dc212..4e65c9c 100644
--- a/services/std_svc/spm/spm_mm/spm_mm_setup.c
+++ b/services/std_svc/spm/spm_mm/spm_mm_setup.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2023, ARM Limited and Contributors. All rights reserved.
  * Copyright (c) 2021, NVIDIA Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
@@ -21,7 +21,7 @@
 
 #include "spm_common.h"
 #include "spm_mm_private.h"
-#include "spm_mm_shim_private.h"
+#include "spm_shim_private.h"
 
 /* Setup context of the Secure Partition */
 void spm_sp_setup(sp_context_t *sp_ctx)
diff --git a/services/std_svc/spm/spm_mm/spm_mm_shim_private.h b/services/std_svc/spm/spm_mm/spm_mm_shim_private.h
deleted file mode 100644
index f69c748..0000000
--- a/services/std_svc/spm/spm_mm/spm_mm_shim_private.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef SPM_MM_SHIM_PRIVATE_H
-#define SPM_MM_SHIM_PRIVATE_H
-
-#include <stdint.h>
-
-#include <lib/utils_def.h>
-
-/* Assembly source */
-IMPORT_SYM(uintptr_t, spm_shim_exceptions_ptr,		SPM_SHIM_EXCEPTIONS_PTR);
-
-/* Linker symbols */
-IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_START__,	SPM_SHIM_EXCEPTIONS_START);
-IMPORT_SYM(uintptr_t, __SPM_SHIM_EXCEPTIONS_END__,	SPM_SHIM_EXCEPTIONS_END);
-
-/* Definitions */
-
-#define SPM_SHIM_EXCEPTIONS_SIZE	\
-	(SPM_SHIM_EXCEPTIONS_END - SPM_SHIM_EXCEPTIONS_START)
-
-#endif /* SPM_MM_SHIM_PRIVATE_H */
diff --git a/services/std_svc/spm/spm_mm/spm_mm_xlat.c b/services/std_svc/spm/spm_mm/spm_mm_xlat.c
index b1ca55a..858ca1b 100644
--- a/services/std_svc/spm/spm_mm/spm_mm_xlat.c
+++ b/services/std_svc/spm/spm_mm/spm_mm_xlat.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2023, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -15,7 +15,7 @@
 #include <services/spm_mm_svc.h>
 
 #include "spm_mm_private.h"
-#include "spm_mm_shim_private.h"
+#include "spm_shim_private.h"
 
 /* Place translation tables by default along with the ones used by BL31. */
 #ifndef PLAT_SP_IMAGE_XLAT_SECTION_NAME