| commit | 1ad2c41f357f497a07dad51ecaec8a4b1ecea647 | [log] [tgz] |
|---|---|---|
| author | Davidson K <davidson.kumaresan@arm.com> | Fri Jan 13 14:02:13 2023 +0530 |
| committer | davidson kumaresan <davidson.kumaresan@arm.com> | Fri Jan 27 08:01:02 2023 +0100 |
| tree | 28f1d38a17ec2fc3c8e4f1f8f693f476f2589368 | |
| parent | 7a2fe24597405f2d31e6a08a34ce2afb92ae811f [diff] |
feat(plat/tc): enable MPAM functionality of L3 DSU cache The L3 cache in the DSU supports the Memory System Resources Partitioning and Monitoring (MPAM). The MPAM specific registers in the DSU are accessed through utility bus of DSU that are memory mapped from 0x1_0000_1000. Signed-off-by: Davidson K <davidson.kumaresan@arm.com> Change-Id: I2798181d599228e96dd4c0043a2ccd94668c7e20