marvell/a3700: Prevent SError accessing PCIe link while it is down
When the link goes down (e.g. during a retrain), accessing the device
configuration space can trigger an ARM64 SError interrupt. Such
conditions cannot be predicted, so to avoid a crash the SError is
ignored.
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Change-Id: I2b1fd3296cc1c88b9ca1fe21c0924cb324eed58d
diff --git a/plat/marvell/a3700/common/a3700_ea.c b/plat/marvell/a3700/common/a3700_ea.c
new file mode 100644
index 0000000..dd46beb
--- /dev/null
+++ b/plat/marvell/a3700/common/a3700_ea.c
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2019 Repk repk@triplefau.lt
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ * https://spdx.org/licenses
+ */
+#include <common/bl_common.h>
+#include <common/debug.h>
+#include <arch_helpers.h>
+
+#define ADVK_SERROR_SYNDROME 0xbf000002
+
+void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
+ void *handle, uint64_t flags)
+{
+ if (syndrome != ADVK_SERROR_SYNDROME) {
+ ERROR("Unhandled External Abort received on 0x%lx at EL3!\n",
+ read_mpidr_el1());
+ ERROR(" exception reason=%u syndrome=0x%llx\n", ea_reason,
+ syndrome);
+ panic();
+ }
+}