feat(tc): enable trng
Enable the trng on the platform, which can be used by other features.
`rng-seed` has been removed and enabled `FEAT_RNG_TRAP` to trap to EL3
when accessing system registers RNDR and RNDRRS
Change-Id: Ibde39115f285e67d31b14863c75beaf37493deca
Signed-off-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Icen Zeyada <Icen.Zeyada2@arm.com>
diff --git a/fdts/tc-base.dtsi b/fdts/tc-base.dtsi
index 691a3b8..33e1657 100644
--- a/fdts/tc-base.dtsi
+++ b/fdts/tc-base.dtsi
@@ -46,21 +46,6 @@
serial0 = &os_uart;
};
- chosen {
- /*
- * Add some dummy entropy for Linux so it
- * doesn't delay the boot waiting for it.
- */
- rng-seed = <0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
- 0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
- 0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
- 0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
- 0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
- 0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
- 0x01 0x02 0x04 0x05 0x06 0x07 0x08 \
- 0x01 0x02 0x04 0x05 0x06 0x07 0x08 >;
- };
-
cpus {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/plat/arm/board/tc/platform.mk b/plat/arm/board/tc/platform.mk
index b2b3253..8b15a6f 100644
--- a/plat/arm/board/tc/platform.mk
+++ b/plat/arm/board/tc/platform.mk
@@ -40,6 +40,12 @@
ENABLE_SPE_FOR_NS := 3
ENABLE_FEAT_TCR2 := 3
+ifneq ($(filter ${TARGET_PLATFORM}, 3),)
+ENABLE_FEAT_RNG_TRAP := 0
+else
+ENABLE_FEAT_RNG_TRAP := 1
+endif
+
CTX_INCLUDE_AARCH32_REGS := 0
ifeq (${SPD},spmd)
@@ -47,6 +53,8 @@
CTX_INCLUDE_PAUTH_REGS := 1
endif
+TRNG_SUPPORT := 1
+
# TC RESOLUTION - LIST OF VALID OPTIONS (this impacts only FVP)
TC_RESOLUTION_OPTIONS := 640x480p60 \
1920x1080p60
@@ -285,8 +293,10 @@
endif
endif
-ifeq (${TRNG_SUPPORT},1)
- BL31_SOURCES += plat/arm/board/tc/tc_trng.c
+BL31_SOURCES += plat/arm/board/tc/tc_trng.c
+
+ifneq (${ENABLE_FEAT_RNG_TRAP},0)
+ BL31_SOURCES += plat/arm/board/tc/tc_rng_trap.c
endif
ifneq (${PLATFORM_TEST},)
diff --git a/plat/arm/board/tc/tc_rng_trap.c b/plat/arm/board/tc/tc_rng_trap.c
new file mode 100644
index 0000000..b055fe4
--- /dev/null
+++ b/plat/arm/board/tc/tc_rng_trap.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2025, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <assert.h>
+
+#include <bl31/sync_handle.h>
+#include <context.h>
+#include <plat/common/plat_trng.h>
+
+#define XZR_REG_NUM 31
+
+
+int plat_handle_rng_trap(uint64_t esr_el3, cpu_context_t *ctx)
+{
+ uint64_t entropy;
+
+ /* extract the target register number from the exception syndrome */
+ unsigned int rt = get_sysreg_iss_rt(esr_el3);
+
+ /* ignore XZR accesses and writes to the register */
+ assert(rt != XZR_REG_NUM && !is_sysreg_iss_write(esr_el3));
+
+ if (!plat_get_entropy(&entropy)) {
+ ERROR("Failed to get entropy\n");
+ panic();
+ }
+
+ /* Emulate RNDR and RNDRRS */
+ gp_regs_t *gpregs = get_gpregs_ctx(ctx);
+
+ write_ctx_reg(gpregs, rt, entropy);
+
+ /*
+ * We successfully handled the trap, continue with the next
+ * instruction.
+ */
+ return TRAP_RET_CONTINUE;
+}