| commit | e200457d6cc21c81805bbdafeae650ed192640ae | [log] [tgz] |
|---|---|---|
| author | Madhukar Pappireddy <madhukar.pappireddy@arm.com> | Thu Jul 18 15:54:32 2024 +0200 |
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Thu Jul 18 15:54:32 2024 +0200 |
| tree | ae97bc6b20af02ae5839e8550a54df7fb45d99ea | |
| parent | 4087c87b54274c5dca6a0246474ad323b885d2b8 [diff] | |
| parent | e6946b60cbb9c1df6ab2d0fcabce120a95c2aaa3 [diff] |
Merge changes from topic "clk_fixed_divider" into integration * changes: feat(nxp-clk): set rate for clock fixed divider feat(nxp-clk): add A53 clock objects feat(nxp-clk): set rate for PLL divider objects feat(nxp-clk): set rate for PLL objects