tree d1eb506a1519dca0fa331b1f3024a20c72a05385
parent c035d9dcfe11910d6f6415e871507d9bd1490e16
author Alex Leibovich <alexl@marvell.com> 1552229102 +0200
committer Marcin Wojtas <mw@semihalf.com> 1591481163 +0200

ddr: a80x0: add DDR 32-bit ECC mode support

Change a topology map from internal database
to SPD based for 32bit bus width mode

Change-Id: I803166893ddc2fd916fc8a1c27fffd34b6ec0c72
Signed-off-by: Alex Leibovich <alexl@marvell.com>