commit 03f354152ee57fa09d6f75b4e11b26917b632d07
author Konstantin Porotchkin <kostap@marvell.com> Sun Mar 31 17:16:35 2019 +0300
committer Marcin Wojtas <mw@semihalf.com> Fri Jun 19 18:03:29 2020 +0200
tree 403d2a6930f6b3e67312aff8afa9ea633d855ee3
parent d2a19ccd29e79dd5cb9685094c2c03b8e897f45e

plat: marvell: armada: add LLC SRAM CCU setup for AP806/AP807 platforms

Extend the CCU tables with secure SRAM window in all board
setups that uses SoCs based on AP806/AP807 North Bridges

Change-Id: I4dc315e4ea847562ac8648d8a8739244b548c70e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c

diff --git a/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c b/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c
index f8a1c40..7fc33f1 100644
--- a/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c
+++ b/plat/marvell/armada/a8k/a70x0_amc/board/marvell_plat_config.c
@@ -93,6 +93,9 @@
 #ifdef IMAGE_BLE
 	{0x00000000f2000000,	0x4000000,	IO_0_TID}, /* IO window */
 #else
+#if LLC_SRAM
+	{PLAT_MARVELL_LLC_SRAM_BASE, PLAT_MARVELL_LLC_SRAM_SIZE, SRAM_TID},
+#endif
 	{0x00000000f2000000,	0xe000000,	IO_0_TID},
 	{0x00000000c0000000,    0x30000000,	IO_0_TID}, /* IO window */
 	{0x0000000800000000,    0x200000000,	IO_0_TID}, /* IO window */