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git01.mediatek.com / filogic / atf / 03edbde6c00befb51fe0f7d77b7a2825835d34b9 / . / plat / xilinx / versal_net
tree: d441908eb6e5e05d5695d058fe06bf8f9df79b5f [path history] [tgz]
  1. aarch64/
  2. include/
  3. pm_service/
  4. tsp/
  5. bl31_versal_net_setup.c
  6. plat_psci.c
  7. plat_psci_pm.c
  8. plat_topology.c
  9. platform.mk
  10. sip_svc_setup.c
  11. versal_net_gicv3.c
  12. versal_net_ipi.c