commit 0345fc3a89009118338d8310e0f6022aafd2b653
author Jeenu Viswambharan <jeenu.viswambharan@arm.com> Fri Sep 29 11:14:02 2017 +0100
committer Jeenu Viswambharan <jeenu.viswambharan@arm.com> Tue Oct 17 14:55:17 2017 +0100
tree 0bf059547f6bdb6fe43c73d5ba5dfbc40b0a4737
parent ecb05e90f7a774aff9a3f1e4544bc23f3feeb8fb

poplar: Migrate to using interrupt properties

Change-Id: Ibca6ea29be32783de666e0e0a0481668fc11860f
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>

plat/hisilicon/poplar/include/platform_def.h

diff --git a/plat/hisilicon/poplar/include/platform_def.h b/plat/hisilicon/poplar/include/platform_def.h
index 1b44dd7..b7afe82 100644
--- a/plat/hisilicon/poplar/include/platform_def.h
+++ b/plat/hisilicon/poplar/include/platform_def.h
@@ -9,6 +9,8 @@
 
 #include <arch.h>
 #include <common_def.h>
+#include <gic_common.h>
+#include <interrupt_props.h>
 #include <tbbr/tbbr_img_def.h>
 #include "hi3798cv200.h"
 #include "poplar_layout.h"		/* BL memory region sizes, etc */
@@ -69,20 +71,34 @@
 #define PLAT_ARM_GICD_BASE	GICD_BASE
 #define PLAT_ARM_GICC_BASE	GICC_BASE
 
-#define PLAT_ARM_G1S_IRQS	HISI_IRQ_SEC_SGI_0,  \
-				HISI_IRQ_SEC_SGI_1,  \
-				HISI_IRQ_SEC_SGI_2,  \
-				HISI_IRQ_SEC_SGI_3,  \
-				HISI_IRQ_SEC_SGI_4,  \
-				HISI_IRQ_SEC_SGI_5,  \
-				HISI_IRQ_SEC_SGI_6,  \
-				HISI_IRQ_SEC_SGI_7,  \
-				HISI_IRQ_SEC_TIMER0, \
-				HISI_IRQ_SEC_TIMER1, \
-				HISI_IRQ_SEC_TIMER2, \
-				HISI_IRQ_SEC_TIMER3, \
-				HISI_IRQ_SEC_AXI
+#define PLAT_ARM_G1S_IRQ_PROPS(grp) \
+	INTR_PROP_DESC(HISI_IRQ_SEC_SGI_0, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_SGI_1, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_SGI_2, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_SGI_3, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_SGI_4, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_SGI_5, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_SGI_6, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_SGI_7, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_TIMER0, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_TIMER1, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_TIMER2, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_TIMER3, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL), \
+	INTR_PROP_DESC(HISI_IRQ_SEC_AXI, GIC_HIGHEST_SEC_PRIORITY, grp, \
+			GIC_INTR_CFG_LEVEL)
 
-#define PLAT_ARM_G0_IRQS
+#define PLAT_ARM_G0_IRQ_PROPS(grp)
 
 #endif /* __PLATFORM_DEF_H__ */