feat(stm32mp2-fdts): add sdmmc nodes in SoC DT file
Add the sdmmc1 & sdmmc2 nodes in stm32mp251.dtsi file, to support
eMMC or SD-cards.
To avoid increasing DT size if SD-card or eMMC boot is not selected,
the nodes are removed from DT thanks to stm32mp25-bl2.dtsi overlay.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I2ed841442b7dddf0c441ae3b3d2462ef535f9951
diff --git a/fdts/stm32mp25-bl2.dtsi b/fdts/stm32mp25-bl2.dtsi
index 49a3712..769aab2 100644
--- a/fdts/stm32mp25-bl2.dtsi
+++ b/fdts/stm32mp25-bl2.dtsi
@@ -4,6 +4,15 @@
*/
/ {
+ soc@0 {
+#if !STM32MP_EMMC && !STM32MP_SDMMC
+ rifsc@42080000 {
+ /delete-node/ mmc@48220000;
+ /delete-node/ mmc@48230000;
+ };
+#endif
+ };
+
/*
* UUID's here are UUID RFC 4122 compliant meaning fieds are stored in
* network order (big endian)
diff --git a/fdts/stm32mp251.dtsi b/fdts/stm32mp251.dtsi
index 37035dd..c8c50e5 100644
--- a/fdts/stm32mp251.dtsi
+++ b/fdts/stm32mp251.dtsi
@@ -97,6 +97,32 @@
resets = <&rcc USART2_R>;
status = "disabled";
};
+
+ sdmmc1: mmc@48220000 {
+ compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00353180>;
+ reg = <0x48220000 0x400>, <0x44230400 0x8>;
+ clocks = <&rcc CK_KER_SDMMC1>;
+ clock-names = "apb_pclk";
+ resets = <&rcc SDMMC1_R>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <120000000>;
+ status = "disabled";
+ };
+
+ sdmmc2: mmc@48230000 {
+ compatible = "st,stm32mp25-sdmmc2", "arm,pl18x", "arm,primecell";
+ arm,primecell-periphid = <0x00353180>;
+ reg = <0x48230000 0x400>, <0x44230800 0x8>;
+ clocks = <&rcc CK_KER_SDMMC2>;
+ clock-names = "apb_pclk";
+ resets = <&rcc SDMMC2_R>;
+ cap-sd-highspeed;
+ cap-mmc-highspeed;
+ max-frequency = <120000000>;
+ status = "disabled";
+ };
};
bsec: efuse@44000000 {