commit 0129707ce0b602beb3aa5295bcce2b12bdfdfede
author Michal Simek <michal.simek@amd.com> Tue Apr 25 14:14:06 2023 +0200
committer Michal Simek <michal.simek@amd.com> Wed Apr 26 10:28:37 2023 +0200
tree 5f82ddcf3b002e16f8f4fa4189b3443bfd1a681b
parent 3dc93b8361bd3ff66ebba31caf888624dfe4964f

feat(xilinx): sync copyright format

Use the same format in all files 's/Copyright (C)/Copyright (c)/g'.

Change-Id: I0e200eb135e7369d0e6b3b694acd406ec10ca9e7
Signed-off-by: Michal Simek <michal.simek@amd.com>

plat/xilinx/versal_net/versal_net_gicv3.c

diff --git a/plat/xilinx/versal_net/versal_net_gicv3.c b/plat/xilinx/versal_net/versal_net_gicv3.c
index e7d8e75..2fdef12 100644
--- a/plat/xilinx/versal_net/versal_net_gicv3.c
+++ b/plat/xilinx/versal_net/versal_net_gicv3.c
@@ -1,7 +1,7 @@
 /*
  * Copyright (c) 2018-2019, Arm Limited and Contributors. All rights reserved.
  * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved.
- * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
+ * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */