tree 00db093dd1481dc07924f494580abf82f326554b
parent 42771afa7b2f9d63515b3b0a723fbfc8d5b7b1f7
author lauwal01 <lauren.wehrmeister@arm.com> 1561394850 -0500
committer lauwal01 <lauren.wehrmeister@arm.com> 1562077037 -0500

Workaround for Neoverse N1 erratum 1262888

Neoverse N1 erratum 1262888 is a Cat B erratum [1],
present in older revisions of the Neoverse N1 processor core.
The workaround is to set a bit in the implementation defined
CPUECTLR_EL1 system register, which disables the MMU hardware prefetcher.

[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.pjdoc-466751330-10325/index.html

Change-Id: Ib733d748e32a7ea6a2783f3d5a9c5e13eee01105
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>